EPM7256SQC208-15 vs EPM7256SQC208-10 Vergleich
Detaillierter Direktvergleich von EPM7256SQC208-15 von Altera und EPM7256SQC208-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM7256SQC208-10 - MAX 7000S CPLD, 256 Macrocells, 10ns, 208-PQFP | Intel
EPM7256SQC208-10 ObsoleteSpezifikationsvergleich
| Parameter | EPM7256SQC208-15 | EPM7256SQC208-10 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3,65 | $11,20 |
| Family | MAX 7000S | — |
| Series | EPM7256 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 256 | 256 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Usable Gates | 5000 | 5,000 |
| User I/O Pins | 164 | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Betriebstemperaturbereich | 0 C to +70 C (Commercial) | — |
| Gehäuse | 208-pin PQFP (28x28 mm) | 208-pin PQFP (SQC208) |
| Montageart | Surface Mount | Surface Mount |
| Programmable Power Mode | Yes (per-macrocell turbo-bit) | — |
| JTAG (IEEE 1149.1) Boundary-Scan | Yes | — |
| In-System Programmability (ISP) | Yes | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| RoHS-Status | Contains lead / RoHS non-compliant (per third-party listing) | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free Status | Contains lead | — |
| Number of I/O Pins | — | 164 |
| Propagation Delay (tPD) | — | 10 ns |
| Counter Speed (fCNT) | — | Up to 175.4 MHz |
| Programmable Technology | — | EEPROM (in-system programmable) |
| JTAG Support (IEEE 1149.1) | — | Yes |
| PCI Compliance | — | PCI Local Bus Specification 2.2 compliant |
| Betriebstemperatur | — | 0C to +70C (commercial) |
| MSL-Level | — | 3 (168 hours) |