EPM9320LC84-10 vs EPM9320ALI84-10 Vergleich

Detaillierter Direktvergleich von EPM9320LC84-10 von Intel und EPM9320ALI84-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM9320LC84-10 EPM9320ALI84-10
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $84,96 $19,95
Family MAX 9000 EPLD MAX 9000
Device EPM9320 —
Macrocells 320 320
Usable Gates 6000 (typical) 6,000 to 12,000
Logic Array Blocks (LABs) 16 —
Maximum User I/O Pins 168 (varies by package) —
Pin-to-Pin Logic Delay (tPD) 10 ns —
Maximum Frequency (fCNT) [DATA_NEEDED: fCNT in MHz] —
Supply Voltage (VCC) 5.0 V (typical, see datasheet) 5.0 V
Process Technology 0.7 µm CMOS EEPROM/UV-EPROM CMOS
Gehäuse 84-pin PLCC (JEDEC MO-047) 84-pin PLCC (Plastic Leaded Chip Carrier)
Montageart Surface Mount (PLCC socket also common) Surface Mount (PLCC socket compatible)
Betriebstemperatur 0C to +70C (commercial) [DATA_NEEDED: exact grade suffix] —
Programming Interface JTAG (IEEE 1149.1) boundary-scan, Altera ByteBlaster compatible —
Configuration Non-volatile EEPROM (instant-on, no boot PROM) —
RoHS-Status ROHS3 Compliant (per fpgalink listing) —
Feuchtigkeitsempfindlichkeitsgrad (MSL) MSL-3, 168 hours (per fpgalink listing) —
Manufacturer Lead Time 1-7 days (per fpgalink listing) —
Product Type — CPLD (Complex Programmable Logic Device)
User I/O Pins — 84
Pin-to-Pin Delay (Tpd1) — 10 ns
Maximum Counter Frequency — 144 MHz
In-System Programmability — Yes, via IEEE 1149.1 JTAG
Program Memory Technology — CMOS EEPROM
Architecture — Multiple Array MatriX (MAX)
Betriebstemperaturbereich — -40C to +85C (Industrial)

Datenblätter & Ressourcen

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