EPM9480RC208-15N vs EPM9560RC208-15 Vergleich
Detaillierter Direktvergleich von EPM9480RC208-15N von Altera und EPM9560RC208-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9480RC208-15N | EPM9560RC208-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $0,00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Usable Gates | 10,000 | 12,000 gates |
| Macro Cells | 480 | 560 macro cells |
| Maximum Frequency | 117.6 MHz | — |
| Propagation Delay | 15 ns (speed grade -15) | — |
| Versorgungsspannung | 5.0 V | 5.0 V |
| Gehäuse | 208-pin RQFP | 208-pin RQFP (Power Quad Flat Pack) |
| Montageart | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (ISP via JTAG) | Yes, via IEEE Std. 1149.1 JTAG |
| JTAG Interface | IEEE Std. 1149.1 | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| RoHS-Status | ROHS3 Compliant | [DATA_NEEDED: RoHS status] |
| Moisture Sensitivity Level | MSL 3 (168 Hours) | — |
| Manufacturer Standard Lead Time | 1-7 Days | — |
| Architecture | Multiple Array MatriX (MAX) third-generation | Third-generation Multiple Array MatriX (MAX) |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Speed | — | 117.6 MHz |
| Configuration Technology | — | EEPROM (non-volatile) |
| Number of I/O Pins | — | [DATA_NEEDED: number of I/O pins] |
| Logic Array Blocks | — | [DATA_NEEDED: number of logic array blocks] |
| Speed Grade | — | -15 (15 ns pin-to-pin) |