EPM9560ARC304-10F vs EPM9560GC280-15 Vergleich
Detaillierter Direktvergleich von EPM9560ARC304-10F von Altera und EPM9560GC280-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM9560GC280-15 - MAX 9000 CPLD, 560 Macro Cells, 15ns CPGA280 | Intel / Altera
EPM9560GC280-15 ObsoleteSpezifikationsvergleich
| Parameter | EPM9560ARC304-10F | EPM9560GC280-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $115,00 |
| Device Family | MAX 9000A | — |
| Programmable Type | In System Programmable (ISP) | — |
| Number of Macrocells | 560 | — |
| Number of Logic Elements/Blocks | 35 LABs | — |
| Number of Gates | 12000 | — |
| Number of I/O | 216 | — |
| Maximum Delay Time (tPD) | 10 ns | — |
| Supply Voltage (Internal) | 4.75 V to 5.25 V | — |
| Betriebstemperatur | 0 C to +70 C (commercial) | — |
| Gehäuse | 304-pin RQFP (PowerQuad II) | — |
| Package Code | FQFP | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| Montageart | Surface Mount | Through-Hole |
| Configuration Memory | EEPROM (non-volatile) | — |
| JTAG Support | IEEE 1149.1 (ISP) | — |
| RoHS-Status | RoHS | Non-compliant (ceramic CPGA, contains lead) |
| Speed Grade | -10 (10 ns) | — |
| Family | — | MAX 9000 |
| Device Type | — | EE PLD (CMOS EEPROM-based CPLD) |
| Macro Cells | — | 560 |
| Typical Gates | — | 12,000 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tpd) | — | 15 ns (speed grade -15) |
| Propagation Delay (alternate datasheet figure) | — | 16.6 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Package Type | — | CPGA-280 (Ceramic Pin Grid Array, 280 pins) |
| Programmability | — | In-System Programmable (ISP) via JTAG IEEE 1149.1 |
| Technology | — | CMOS EEPROM, 0.5 um process (MAX third-gen) |
| Architecture | — | Multiple Array MatriX (MAX) |
| Lebenszyklusstatus | — | Obsolete (legacy Altera MAX 9000 family) |