EPM9560ARI208-10N vs EPM9320ARI208-10N Vergleich
Detaillierter Direktvergleich von EPM9560ARI208-10N von Altera und EPM9320ARI208-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM9560ARI208-10N - MAX 9000 CPLD 12K Gates 560 Macrocells | Altera
EPM9560ARI208-10N ObsoleteAltera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N ObsoleteSpezifikationsvergleich
| Parameter | EPM9560ARI208-10N | EPM9320ARI208-10N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $22,10 | $16,20 |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 | 6,000 |
| Macrocells | 560 | 320 |
| Logic Array Blocks (LABs) | 35 | 20 |
| Maximum User I/O Pins | 212 | — |
| Flip-Flops | 484 | — |
| Propagation Delay (tPD1) | 10 ns | — |
| Clock-to-Output (tCO) | 4.5 ns | — |
| Setup Time (tSU) | 3.0 ns | — |
| Maximum Counter Frequency (fCNT) | 144.9 MHz | — |
| Versorgungsspannung | 5.0 V | 4.5 V to 5.5 V |
| Logic Family | CMOS EEPROM | — |
| Programming Interface | JTAG (IEEE 1149.1) - In-System Programmable | — |
| Gehäuse | 208-pin RQFP (Plastic) | 208-pin RQFP (S-PQFP-G208) |
| Betriebstemperatur | 0 C to 70 C (Commercial) | -40 C to +85 C (industrial) |
| Montageart | Surface Mount | Surface Mount |
| Maximum Operating Frequency | — | 144.9 MHz |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| Process Technology | — | CMOS EEPROM |
| Programmability | — | In-system (ISP) via IEEE 1149.1 JTAG |
| Global Dedicated Inputs | — | 16 |
| Architecture | — | Multiple Array MatriX (MAX) third-generation |
| RoHS-Status | — | unknown |