EPM9560R1208-20 vs EPM9560ARC240-10 Vergleich

Detaillierter Direktvergleich von EPM9560R1208-20 von Altera und EPM9560ARC240-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM9560R1208-20 EPM9560ARC240-10
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $22,40 $28,80
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 6,000 12,000
Macrocells 560 560
Logic Array Blocks 52 (typical for 560 macrocells) —
Maximum User I/O 212 —
Propagation Delay (tPD) 20 ns —
Maximum Frequency (fMAX) 125 MHz —
Supply Voltage (VCCINT/VCCIO) 5.0 V —
Technology CMOS EEPROM —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Betriebstemperatur 0C to +70C (commercial) 0C to +70C (commercial)
Gehäuse R-1208 (BGA-style fine-pitch) 240-pin PowerQuad QFP (RQFP / EAR240)
Montageart Surface Mount —
Process Technology CMOS EEPROM, third-generation MAX architecture CMOS EEPROM
Architecture Multiple Array MatriX (MAX) with Logic Array Blocks (LABs) and Programmable Interconnect Array (PIA) Multiple Array MatriX (MAX) - third generation
Boundary-Scan Test JTAG IEEE Std. 1149.1 —
Configuration Memory On-chip EEPROM (non-volatile) EEPROM (non-volatile, in-system programmable)
RoHS-Status [DATA_NEEDED: confirm via current distributor data] [DATA_NEEDED: RoHS status]
User I/Os (this package) — 191 (per Mouser listing)
Internal Frequency — 144.9 MHz
Propagation Delay (tpd) — 11.4 ns
Supply Voltage - Internal (VCCINT) — 5.0 V
I/O Supply Voltage (VCCIO) — 3.3 V or 5.0 V (selectable)
Logic Family — CMOS

Datenblätter & Ressourcen

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