EPM9560RC208-15C vs EPM9560RC208-13 Vergleich
Detaillierter Direktvergleich von EPM9560RC208-15C von Altera und EPM9560RC208-13 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560RC208-15C | EPM9560RC208-13 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $0,00 |
| Family | MAX 9000 | — |
| Device Type | EEPROM-based CPLD (EPLD) | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| User I/O Pins | 149 | 208 |
| Propagation Delay (tPD) | 15 ns | 13 ns |
| Maximum Counter Frequency | 117.6 MHz | — |
| Supply Voltage Range | 4.75 V to 5.25 V | — |
| Nominal Supply Voltage | 5.0 V | — |
| I/O Voltage Compatibility | 3.3 V or 5 V | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| Gehäuse | 208-pin RQFP | 208-pin RQFP (Power Quad Flat Pack) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperaturbereich | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Speed Grade | -15 (15 ns) | -13 (13 ns pin-to-pin) |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Architecture | Multiple Array MatriX (MAX) third generation | — |
| Device Family | — | MAX 9000 EPLD |
| Logic Array Blocks (LABs) | — | 20 |
| Package Code | — | RC208 |
| Maximale Taktfrequenz | — | 125 MHz |
| Versorgungsspannung | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| MSL-Level | — | [DATA_NEEDED: MSL level] |