EPM9560RC208-17 vs EPM9560RC208-20 Vergleich
Detaillierter Direktvergleich von EPM9560RC208-17 von Altera und EPM9560RC208-20 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560RC208-17 | EPM9560RC208-20 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $54,75 | $0,00 |
| Family | MAX 9000 | — |
| Product Type | CPLD (EPLD, in-system programmable) | — |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Pin-to-Pin Delay (tPD) | 17 ns | 20 ns |
| Maximum Counter Frequency | 117.6 MHz | — |
| User I/O Pins | 212 | 153 |
| Supply Voltage (VCC) | 5 V | — |
| Gehäuse | 208-pin RQFP (RC208) | 208-pin RQFP (28x28 mm) |
| Programming Technology | EEPROM (in-system programmable) | — |
| Program/Erase Cycles | 100 minimum | — |
| JTAG (IEEE 1149.1) Support | Yes | — |
| Architecture | Third-generation MAX (AND-OR PLA) | — |
| Montageart | Surface Mount | Surface Mount |
| Device Family | — | MAX 9000 (EPM9560) |
| Macrocells | — | 560 |
| Logic Array Blocks | — | 35 |
| Maximale Taktfrequenz | — | 100 MHz |
| Versorgungsspannung | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Betriebstemperatur | — | 0C to +70C (commercial) |
| I/O Standards | — | 5.0 V TTL/CMOS compatible |
| Flip-Flops | — | 772 |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |
| MSL-Level | — | [DATA_NEEDED: MSL level] |