EPM9560RC208-20 vs EPM9560RC208-19 Vergleich
Detaillierter Direktvergleich von EPM9560RC208-20 von Intel und EPM9560RC208-19 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560RC208-20 | EPM9560RC208-19 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $16,20 |
| Device Family | MAX 9000 (EPM9560) | MAX 9000 |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks | 35 | — |
| User I/O Pins | 153 | 149 |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Maximale Taktfrequenz | 100 MHz | — |
| Versorgungsspannung | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes (IEEE 1149.1 JTAG) |
| Gehäuse | 208-pin RQFP (28x28 mm) | RQFP-208 (208-pin PQFP) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature grade] |
| I/O Standards | 5.0 V TTL/CMOS compatible | — |
| Flip-Flops | 772 | 772 |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Propagation Delay (tPD) | — | 19 ns |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Voltage Tolerance | — | 3.3 V / 5 V |
| Technology | — | CMOS EEPROM |
| JEDEC Package Code | — | S-PQFP-G208 |