EPM9560RC208-20N vs EPM9560RC208-10N Vergleich
Detaillierter Direktvergleich von EPM9560RC208-20N von Intel und EPM9560RC208-10N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM9560RC208-10N - MAX 9000 CPLD 560 Macro 10ns 208-RQFP | Intel
EPM9560RC208-10N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM9560RC208-20N | EPM9560RC208-10N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $175,00 |
| Device Family | MAX 9000 (EPM9560) | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Propagation Delay (tPD) | 20 ns | — |
| Gehäuse | 208-pin RQFP (PowerQuad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| User I/O Pins | 149 | 153 |
| Versorgungsspannung | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| JTAG Interface | IEEE Std. 1149.1 | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature grade] |
| RoHS-Status | Lead-free (N suffix) | [DATA_NEEDED: RoHS status] |
| Logic Architecture | Multiple Array MatriX (MAX), third-generation CMOS EEPROM | — |
| Flip-Flops | 772 (per EPM9560 series data) | — |
| Speed Grade | -20 (20 ns) | — |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Family | — | MAX 9000 |
| Device | — | EPM9560 |
| Macro Cells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Delay (tPD1) | — | 10 ns |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Bank Voltage (VCCIO) | — | 5.0 V |
| Process Technology | — | CMOS EEPROM |
| Programmability | — | In-system via IEEE 1149.1 JTAG |