EPM9560RC240-12 vs EPM9560RC240-15C Vergleich
Detaillierter Direktvergleich von EPM9560RC240-12 von Altera und EPM9560RC240-15C von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560RC240-12 | EPM9560RC240-15C |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $0,00 |
| Family | MAX 9000 (EPM9560) | MAX 9000 |
| Device Type | EE PLD / CPLD | EEPROM-based CPLD |
| Macrocells | 560 | 560 |
| Flip-Flops | 772 | — |
| User I/O Pins | 191 | 187 |
| Logic Array Blocks (LABs) | 20 | — |
| Maximum Propagation Delay (tPD) | 13.4 ns | — |
| Speed Grade | -12 (13.4 ns tPD) | — |
| Maximum Operating Frequency (estimated) | ~76 MHz registered | — |
| Core Supply Voltage (VCCINT) | 5 V | — |
| I/O Logic Levels | 3.3 V or 5 V (configurable) | — |
| Gehäuse | PQFP-240 (RC240) 0.500 mm pitch, gull-wing | 240-pin RQFP (PowerQuad II) |
| Montageart | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Process Technology | CMOS | CMOS |
| Betriebstemperatur | [DATA_NEEDED: operating temperature grade] | 0C to +70C (Commercial) |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Usable Gates | — | 12,000 |
| Logic Array Blocks | — | 20 |
| Maximum Internal Frequency | — | 117.6 MHz |
| Propagation Delay (tPD) | — | 15 ns |
| Versorgungsspannung | — | 5.0 V |
| Operating Voltage Range | — | 3.3 V or 5 V |
| Terminal Pitch | — | 0.5 mm |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (ISP via JTAG) |
| JTAG Interface | — | IEEE 1149.1 boundary-scan |
| MSL-Level | — | [DATA_NEEDED: MSL level] |