EPM9560RC240-15C vs EPM9560RC240-2 Vergleich
Detaillierter Direktvergleich von EPM9560RC240-15C von Intel und EPM9560RC240-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560RC240-15C | EPM9560RC240-2 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $180,00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based CPLD | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| Logic Array Blocks | 20 | — |
| User I/O Pins | 187 | — |
| Maximum Internal Frequency | 117.6 MHz | — |
| Propagation Delay (tPD) | 15 ns | — |
| Versorgungsspannung | 5.0 V | 5 V |
| Operating Voltage Range | 3.3 V or 5 V | — |
| Gehäuse | 240-pin RQFP (PowerQuad II) | 240-pin RQFP (Metric QFP) |
| Terminal Pitch | 0.5 mm | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to +70C (Commercial) | [DATA_NEEDED: commercial/industrial grade] |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (ISP via JTAG) | — |
| JTAG Interface | IEEE 1149.1 boundary-scan | — |
| Process Technology | CMOS | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Non-compliant (5V RQFP, pre-RoHS era) |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Logic Elements | — | 560 macrocells |
| Pin-to-Pin Delay | — | 2 ns (speed grade -2) |
| Maximum Frequency | — | 100 MHz |
| User I/O Count | — | 212 |
| Programming Interface | — | JTAG (IEEE 1149.1), in-system programmable |
| Non-Volatile Configuration | — | Yes (EEPROM-based) |
| Lead-Free | — | No (legacy Sn/Pb process) |
| Logic Block Count | — | [DATA_NEEDED: LAB count] |