EPM9560RC240-1O vs EPM9560RC240-3 Vergleich
Detaillierter Direktvergleich von EPM9560RC240-1O von Intel und EPM9560RC240-3 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM9560RC240-1O - MAX 9000 CPLD, 560 Macrocells, 216 I/O, RQFP-240 | Altera
EPM9560RC240-1O ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM9560RC240-1O | EPM9560RC240-3 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $51,07 | $202,32 |
| Family | MAX 9000 | MAX 9000 |
| Usable Gates | 12,000 | 12000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | 20 |
| Maximum User I/O Pins | 216 | — |
| Propagation Delay (tPD) | 12 ns (typ, -1 speed grade) | — |
| Global Setup Time (tFSU) | 3.0 ns | — |
| Clock-to-Output (tFCO) | 4.8 ns | — |
| Maximum Internal Frequency (fCNT) | 145 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Operating Temperature (Grade) | -40C to +85C (industrial, "-1O" suffix) | — |
| Process Technology | CMOS EEPROM, 0.65 um | — |
| Programming | In-system programmable via IEEE 1149.1 JTAG | — |
| Architecture | Multiple Array MatriX (MAX), third generation | — |
| Gehäuse | RQFP-240 (240-pin Reduced-height QFP) | 240-pin RQFP (PowerQuad II) |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant (per Altera/Intel product page) | [DATA_NEEDED: RoHS] |
| Lead-Free | Yes | — |
| Device Type | — | Complex Programmable Logic Device (CPLD) |
| Pin-to-Pin Propagation Delay | — | 3 ns (speed grade -3) |
| Maximum Operating Frequency | — | [DATA_NEEDED: fMAX] |
| Supply Voltage (VCCINT) | — | 5 V |
| Supply Voltage (VCCIO) | — | 5 V |
| User I/O Pins | — | 192 |
| Configuration Memory | — | EEPROM (non-volatile) |
| Betriebstemperaturbereich | — | 0C to +70C (commercial) |
| Lead Finish | — | [DATA_NEEDED: lead finish] |
| MSL-Level | — | [DATA_NEEDED: MSL] |
| JTAG Support | — | [DATA_NEEDED: JTAG] |