EPM9560RC304-15 vs EPM9560RC304-20C Vergleich
Detaillierter Direktvergleich von EPM9560RC304-15 von Altera und EPM9560RC304-20C von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM9560RC304-20C - MAX 9000 CPLD, 560 Macrocells, 5V | Intel / Altera
EPM9560RC304-20C ObsoleteSpezifikationsvergleich
| Parameter | EPM9560RC304-15 | EPM9560RC304-20C |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,40 | $162,00 |
| Device Family | MAX 9000 | — |
| Architecture | Multiple Array MatriX (MAX), EEPROM-based | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 | 16 |
| User I/O Pins | 212 (maximum) | — |
| Propagation Delay (tPD) | 15 ns (combinatorial, pin-to-pin) | — |
| Pin-Anzahl | 304 | — |
| Gehäuse | 304-pin RQFP (Plastic Quad Flat Pack) | 304-pin RQFP |
| Supply Voltage (VCCINT) | 5.0 V | — |
| I/O Standard | 5.0 V TTL / PCI-compliant | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Technology Node | High-performance CMOS, EEPROM process | — |
| Betriebstemperatur | [DATA_NEEDED: industrial/commercial temperature grade] | 0 C to +70 C (commercial) |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | [DATA_NEEDED: lead-free / RoHS compliance status] | [DATA_NEEDED: rohs status] |
| Family | — | MAX 9000 |
| Device Series | — | EPM9560 |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 12,000 |
| Maximum User I/O Pins | — | 212 |
| fMAX (Internal) | — | 100 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns (speed grade -20) |
| Core Supply Voltage | — | 5.0 V |
| I/O Logic Level | — | 3.3 V or 5 V (configurable) |
| Programming Technology | — | EEPROM (in-system programmable) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG |