EPM9560RC304C-3 vs EPM9560RC304-20 Vergleich
Detaillierter Direktvergleich von EPM9560RC304C-3 von Altera und EPM9560RC304-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM9560RC304C-3 - MAX 9000 CPLD, 560 Macrocells, 304-Pin RBGGA | Altera
EPM9560RC304C-3 ObsoleteSpezifikationsvergleich
| Parameter | EPM9560RC304C-3 | EPM9560RC304-20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $95,00 | $0,00 |
| Family | MAX 9000 | — |
| Device Type | CPLD (EPLD) | — |
| Macrocells (Logic Elements) | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Gehäuse | RBGGA-304 (Ceramic Ball Grid Array) | 304-pin RQFP |
| Pin-Anzahl | 304 | — |
| User I/O Pins | 212 | — |
| Speed Grade | -3 (3 ns pin-to-pin, commercial) | -20 |
| Betriebstemperatur | 0 C to +70 C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Versorgungsspannung | 5 V | — |
| Programmability | In-system, non-volatile EEPROM | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Logic Blocks | Logic Array Blocks (LABs) with PIA interconnect | — |
| RoHS-Status | unknown (legacy part, pre-RoHS era) | [DATA_NEEDED: RoHS status] |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Device Family | — | MAX 9000 (EPM9560) |
| Macrocells | — | 560 |
| User I/O Lines | — | 212 |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Core Supply Voltage | — | 5.0 V |
| I/O Voltage | — | 3.3 V or 5 V (configurable) |
| Configuration Technology | — | EEPROM (in-system programmable) |
| JTAG Interface | — | IEEE Std. 1149.1 (built-in) |
| Logic Array Blocks (LABs) | — | 20 |
| MSL-Level | — | [DATA_NEEDED: MSL level] |