EPM9560RI208-10 vs EPM9560RI208-15 Vergleich
Detaillierter Direktvergleich von EPM9560RI208-10 von Intel und EPM9560RI208-15 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560RI208-10 | EPM9560RI208-15 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $67,80 | $20,10 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 144 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| User I/O Pins | 212 (typical for 208-RQFP package) | — |
| Gehäuse | 208-pin RQFP (Power Quad Flat Pack) | — |
| Montageart | Surface Mount | — |
| Betriebstemperatur | -40 °C to +85 °C (Industrial) | 0 °C to 70 °C (industrial grade; per package suffix R) |
| Programming Interface | IEEE 1149.1 (JTAG) / ISP | — |
| Configuration Memory | EEPROM, 100 erase/program cycles | On-chip EEPROM (non-volatile) |
| RoHS-Status | ROHS3 Compliant | ROHS3 Compliant |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | 3 (168 Hours) | 3 (168 hours) |
| Lead Time | 1-7 days (per fpgalink listing) | — |
| Architecture | — | CMOS EEPROM-based Multiple Array MatriX (MAX) |
| Typical Usable Gates | — | 12,000 |
| User I/Os | — | 153 |
| Internal Frequency (max) | — | 145 MHz |
| Propagation Delay (tPD) | — | 11.4 ns (commercial); 15 ns speed grade |
| Logic Family | — | CMOS |
| Anzahl der Pins | — | 208 |
| Package Code | — | HFQFP (Power Quad Flat Pack, gull-wing) |
| Package Type | — | RQFP-208 |
| Supply Voltage (VCC) | — | 5 V nominal (4.5 V to 5.5 V) |
| I/O Voltage Support | — | 3.3 V or 5 V multi-volt I/O |
| In-System Programmability | — | Yes (JTAG / IEEE 1149.1) |
| Boundary-Scan (JTAG) | — | Compliant |