EPM9560RI240-20N vs EPM9560RI240-20 Vergleich
Detaillierter Direktvergleich von EPM9560RI240-20N von Intel und EPM9560RI240-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM9560RI240-20N - MAX 9000 CPLD, 560 Macro, 191 I/O | Intel
EPM9560RI240-20N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM9560RI240-20N | EPM9560RI240-20 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $195,00 | $0,00 |
| Family | MAX 9000 | MAX 9000 |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/Os | 191 | — |
| Maximum Internal Frequency | 145 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 11.4 ns | — |
| Logic Family | CMOS | — |
| Process Technology | CMOS EEPROM | — |
| Programmability | In-system programmable (ISP) via JTAG (IEEE 1149.1) | — |
| Core Supply Voltage | 5.0 V | — |
| MultiVolt I/O | 5.0 V / 3.3 V compatible | — |
| Gehäuse | 240-pin Power-enhanced BGA (RI240) | 240-pin RQFP (PowerQuad II) with exposed pad |
| Betriebstemperatur | 0C to +70C (commercial) | — |
| Programming Language Support | AHDL, VHDL, Verilog HDL | — |
| Development Tools | MAX+PLUS II, Quartus II | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| User I/O Pins | — | 191 |
| Pin-to-Pin Propagation Delay | — | 20 ns |
| Versorgungsspannung | — | 5.0 V |
| Configuration Technology | — | CMOS EEPROM (non-volatile) |
| In-System Programmability | — | Yes (ISP) |
| Montageart | — | Surface Mount |
| Betriebstemperaturbereich | — | Industrial (-40C to +85C) |
| Logic Gates | — | 10,000 |
| Internal Frequency | — | [DATA_NEEDED: internal frequency] |
| Number of Logic Array Blocks | — | [DATA_NEEDED: number of logic array blocks] |
| REACH Status | — | Compliant (per Abacus Technologies listing) |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| Packaging | — | Tray |