ISO6762FDWR vs ISO6760DWR Vergleich
Detaillierter Direktvergleich von ISO6762FDWR von Texas Instruments und ISO6760DWR von Texas Instruments. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Texas Instruments
ISO6760DWR - 6-Channel 50Mbps Digital Isolator | Texas Instruments
ISO6760DWR ✓ AktivSpezifikationsvergleich
| Parameter | ISO6762FDWR | ISO6760DWR |
|---|---|---|
| Marke | Texas Instruments | Texas Instruments |
| Kategorie | Interface ICs | Interface ICs |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1,65 | $0,94 |
| Number of Channels | 6 (4 forward, 2 reverse) | — |
| Datenrate | 50 Mbps | — |
| Isolation Voltage | 5000 Vrms | 5000 Vrms |
| CMTI | 50 kV/µs | 100 kV/µs |
| Supply Voltage (VCC1/VCC2) | 1.8V to 5.5V | — |
| Propagation Delay | [DATA_NEEDED: propagation delay] | [DATA_NEEDED: propagation delay] |
| Gehäuse | SOIC-16 (DW) 7.50mm | 16-SOIC (DW), 0.295 inch width |
| Betriebstemperatur | -40°C to 125°C | -40 °C to +125 °C |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Logic Support | 1.8V logic support | — |
| Isolation Type | Capacitive | — |
| Fail-Safe Output | Yes | — |
| Enable-Pin | Yes | — |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Channel Count | — | 6 |
| Channel Direction | — | 6/0, all forward |
| Maximum Data Rate | — | 50 Mbps |
| Common-Mode Transient Immunity | — | 100 kV/µs |
| Logic Compatibility | — | 1.8 V logic support |
| Product Type | — | General-purpose reinforced digital isolator |
| Anzahl der Pins | — | 16 |
| Versorgungsspannung | — | [DATA_NEEDED: supply voltage range] |
| Ruhestrom | — | [DATA_NEEDED: quiescent current] |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: automotive qualification status] |
| Isolation Class | — | Reinforced |
| Logic Levels | — | [DATA_NEEDED: input and output logic levels] |