KAD2708L-35Q68 vs KAD2710C-17Q68 Vergleich

Detaillierter Direktvergleich von KAD2708L-35Q68 von Renesas Electronics und KAD2710C-17Q68 von Renesas Electronics. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Renesas Electronics
KAD2708L-35Q68 KAD2708L-35Q68 - 8-bit, 350MSPS Single-Channel ADC | Renesas

KAD2708L-35Q68 - 8-bit, 350MSPS Single-Channel ADC | Renesas

KAD2708L-35Q68 ✓ Aktiv
Renesas Electronics
KAD2710C-17Q68 KAD2710C-17Q68 - 10-Bit 170MSPS Pipelined ADC, 68-QFN | Renesas

KAD2710C-17Q68 - 10-Bit 170MSPS Pipelined ADC, 68-QFN | Renesas

KAD2710C-17Q68 ✓ Aktiv

Spezifikationsvergleich

Parameter KAD2708L-35Q68 KAD2710C-17Q68
Marke Renesas Electronics Renesas Electronics
Kategorie ADC/DAC ADC/DAC
Lebenszyklusstatus Aktiv Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $19,50 $24,80
Auflösung 8 bits 10 bit
Sample Rate (max) 350 MSPS —
Number of Channels 1 (single-channel) 1
Architecture Pipelined, FemtoCharge CMOS Pipelined
Input Voltage Range (Differential) 1.5 VP-P —
Analog Input Bandwidth 600 MHz —
SNR (fIN = 175 MHz) 48.8 dBFS —
Power Consumption (typ) < 330 mW —
Digital Output Interface LVCMOS, parallel —
Output Coding Two's complement —
AVDD2 Supply 1.8 V —
AVDD3 Supply 3.3 V —
Internal Reference Yes (on-chip) —
Track-and-Hold Internal —
Clock Divider Selectable divide-by-2 —
Over-Range Indicator Yes Yes
Betriebstemperaturbereich -40 °C to +85 °C -40C to +85C (industrial)
Gehäuse 68-Ld QFN (10 mm × 10 mm) with exposed paddle 68-QFN (10x10 mm) with exposed pad
Montageart Surface Mount —
RoHS-Status Compliant (Pb-free matte tin plate) Compliant (QFN package, Q68 suffix)
MSL-Level Per datasheet TB363 —
Sampling Rate (KAD2710C-17 variant) — 170 MSPS
Family Sampling Rate Range — 105/170/210/275 MSPS
Input Type — Single-ended analog, AC-coupled
Output Interface — Parallel LVCMOS
Analog Supply Voltage — 1.8 V (typical)
Digital Output Supply Voltage — 3.3 V (typical, LVCMOS)
SNR at fIN = 138 MHz — 55.6 dBFS (family typ, 275 MSPS)
Power Dissipation (275 MSPS, family typ) — 265 mW
Input Clock Divider — Selectable divide-by-2
Process Technology — Standard CMOS, FemtoCharge technology

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