LC4032B-5T44C vs LC4032B-5T48C Vergleich
Detaillierter Direktvergleich von LC4032B-5T44C von Lattice Semiconductor und LC4032B-5T48C von Lattice Semiconductor. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | LC4032B-5T44C | LC4032B-5T48C |
|---|---|---|
| Marke | Lattice Semiconductor | Lattice Semiconductor |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $0,00 |
| Device Type | In-System Programmable SuperFAST High-Density PLD | — |
| Macrocell Count | 32 macrocells | 32 macrocells |
| Maximum Operating Frequency | 400 MHz | 400 MHz |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Supported Supply Voltages | 3.3 V, 2.5 V, or 1.8 V | — |
| Global Clock Pins | Up to 4 | — |
| Clock Polarity Control | Programmable | — |
| Product Terms per Output | Up to 80 | — |
| Gehäuse | 48-pin TQFP | 48-pin TQFP |
| Montageart | Surface mount | Surface mount |
| Programming Method | In-system programmable | — |
| Configuration Memory | Nonvolatile configuration storage | — |
| Speed Grade | -5 | — |
| Temperature Range | [DATA_NEEDED: operating temperature range] | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification status] | [DATA_NEEDED: automotive qualification status] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Unit Price | [DATA_NEEDED: unit price] | — |
| Stock | [DATA_NEEDED: current stock] | — |
| Lead Time | [DATA_NEEDED: manufacturer lead time] | — |
| Product Type | — | ispMACH 4000B high-density in-system programmable PLD |
| Supply Voltage Family | — | 3.3 V / 2.5 V / 1.8 V |
| Programming Type | — | In-system programmable |
| Device Family | — | ispMACH 4000 |
| Architecture Description | — | Blend of ispLSI 2000 and ispMACH 4A architectures |
| Logic Type | — | SuperFAST high-density PLD |
| Global Clock Inputs | — | [DATA_NEEDED: global clock input count] |
| I/O Standard | — | [DATA_NEEDED: I/O voltage standards] |
| Betriebstemperaturbereich | — | [DATA_NEEDED: operating temperature range] |