LTC2257IUJ-14 vs LTC2258IUJ-14 Vergleich
Detaillierter Direktvergleich von LTC2257IUJ-14 von Analog Devices und LTC2258IUJ-14 von Analog Devices. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Analog Devices
LTC2257IUJ-14 - 14-bit, 40Msps Ultralow Power 1.8V ADC | Analog Devices
LTC2257IUJ-14 ✓ AktivAnalog Devices
LTC2258IUJ-14 - 14-Bit 65Msps Ultralow Power 1.8V ADC | Analog Devices
LTC2258IUJ-14 ✓ AktivSpezifikationsvergleich
| Parameter | LTC2257IUJ-14 | LTC2258IUJ-14 |
|---|---|---|
| Marke | Analog Devices | Analog Devices |
| Kategorie | ADC/DAC | ADC/DAC |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $16,40 | $15,05 |
| Auflösung | 14 bit | 14 bits |
| Sample Rate | 40 Msps | — |
| Architecture | Pipelined | Pipelined |
| Number of Inputs | 1 | — |
| Input Type | Differential (single-ended capable) | — |
| Analog Supply Voltage | 1.7 V to 1.9 V (1.8 V nominal) | — |
| Digital Output Supply | 1.2 V to 1.8 V | — |
| Power Dissipation | [DATA_NEEDED: exact mW at 40 Msps, datasheet figure] | 81 mW at 65 Msps |
| INL (typical) | ±1 LSB | +/-1 LSB |
| DNL (typical) | ±0.3 LSB | +/-0.3 LSB |
| Transition Noise | 1.13 LSB RMS | — |
| Missing Codes | None over temperature | None over temperature |
| Output Interface | CMOS / DDR CMOS / DDR LVDS (selectable) | — |
| SNR | [DATA_NEEDED: SNR dBFS at fin] | 74 dB |
| SFDR | [DATA_NEEDED: SFDR dBc at fin] | 88 dB |
| Gehäuse | 40-QFN (UJ) 6x6 mm with exposed pad | 40-QFN (6 mm x 6 mm), exposed pad |
| Montageart | Surface Mount | — |
| Betriebstemperatur | -40C to +85C (I grade) | — |
| Configuration Interface | SPI serial port | — |
| Power-Saving Modes | Shutdown, Nap modes | — |
| Clock Duty-Cycle Stabilizer | Optional, on-chip | — |
| Reference Type | External or internal (per variant) | — |
| RoHS-Status | Compliant (#PBF suffix) | — |
| Abtastrate | — | 65 Msps |
| Number of Input Channels | — | 1 |
| Supply Voltage (AVDD) | — | 1.8 V (single) |
| Transition Noise (RMS) | — | 1.13 LSB |
| Full-Power Input Bandwidth | — | 800 MHz |
| Selectable Input Range | — | 1 Vp-p to 2 Vp-p |
| Output Modes | — | CMOS / DDR CMOS / DDR LVDS |
| CMOS Output Swing (OVDD) | — | 1.2 V to 1.8 V |
| Betriebstemperaturbereich | — | -40 C to +85 C (industrial, IUJ suffix) |