M1AFS1500-1FGG484K vs M1AFS600-1FG484 Vergleich
Detaillierter Direktvergleich von M1AFS1500-1FGG484K von Microchip Technology und M1AFS600-1FG484 von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
M1AFS1500-1FGG484K - Fusion FPGA 1.5M Gates ARM Cortex-M1 | Microchip
M1AFS1500-1FGG484K ✓ AktivSpezifikationsvergleich
| Parameter | M1AFS1500-1FGG484K | M1AFS600-1FG484 |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.560,00 | $172,00 |
| Family | Fusion Mixed-Signal FPGA | Fusion |
| System Gates | 1,500,000 | 600K |
| Logic Cells | 38,400 | — |
| User I/O | 223 | — |
| Flash Memory Bits | 276,480 | 110592 |
| Processor Core | ARM Cortex-M1 | — |
| Core Supply Voltage | 1.5 V | — |
| Process Technology | 130 nm flash-based | — |
| Maximum Fabricate Frequency (family, per Jotrin) | 1282.05 MHz | — |
| Gehäuse | 484-ball FBGA, 1.00 mm ball pitch | 484-BGA (FBGA) |
| Montageart | Surface Mount | Surface Mount |
| Configuration | Flash-based, live at power-up, single chip | — |
| Analog Peripherals | Integrated configurable analog (voltage/current/temperature monitoring) | — |
| Clock Management | On-chip clock generation and management circuitry | — |
| RoHS-Status | RoHS Compliant | Non-Compliant |
| Lead Free Status | Lead Free | Contains Lead |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Packaging | Tray | — |
| Number of I/O | — | 172 |
| Core Voltage | — | 1.5V |
| Technology | — | 130nm |
| Maximale Taktfrequenz | — | 1282.05MHz |
| Number of Logic Elements | — | [DATA_NEEDED: number of logic elements] |
| Total RAM Bits | — | [DATA_NEEDED: total RAM bits] |
| Number of PLLs | — | [DATA_NEEDED: number of PLLs] |