M1AFS250-1PQ208I vs M1AFS250-PQ208 Vergleich
Detaillierter Direktvergleich von M1AFS250-1PQ208I von Microchip Technology und M1AFS250-PQ208 von Microsemi. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
M1AFS250-1PQ208I - Fusion FPGA 250K Gates 208-QFP | Microchip
M1AFS250-1PQ208I ✓ AktivSpezifikationsvergleich
| Parameter | M1AFS250-1PQ208I | M1AFS250-PQ208 |
|---|---|---|
| Marke | Microchip Technology | Microsemi |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $47,80 | $28,60 |
| Logic Cells (Tiles) | 6144 | — |
| Equivalent Gates | 250000 | — |
| User I/O | 93 | — |
| RAM Bits | 36864 | — |
| Family | Fusion (M1) Mixed-Signal FPGA | — |
| Core Voltage | 1.5 V | — |
| Technology | 130 nm CMOS Flash | — |
| Speed Grade | -1 | — |
| Betriebstemperatur | -40C to +85C (Industrial) | [DATA_NEEDED: operating temperature range] |
| Gehäuse | 208-pin PQFP (PQ208 / BFQFP) | 208-Pin PQFP / BFQFP |
| Montageart | Surface Mount | Surface Mount |
| Configuration Memory | Flash (non-volatile, single-chip) | Flash-based, on-chip (nonvolatile) |
| Analog Peripherals | Configurable analog blocks (voltage, temperature, current monitoring) | — |
| Clock Management | Clock Conditioning Circuits (CCC) | On-chip PLL / clock conditioning circuitry |
| MSL-Level | [DATA_NEEDED: MSL Level] | — |
| RoHS-Status | Compliant (non-Pb PQ208 version is M1AFS250-1PQ208I; PQG208 is Pb-free variant naming) | [DATA_NEEDED: RoHS status] |
| Radiation Characteristic | Flash-based, immune to configuration upset vs SRAM FPGAs | — |
| Logic Gates | — | 250000 gates |
| Fabric Cells / VersaTiles | — | 6144 cells |
| Number of I/O | — | 93 |
| User Flash Memory | — | 36864 bits |
| Core Supply Voltage | — | 1.5 V |
| Process Technology | — | 130 nm flash CMOS |
| Security | — | 128-bit flash lock, AES decryption |
| Terminal Pitch | — | 0.5 mm |
| Analog Blocks | — | Configurable analog (ADC inputs, monitoring) per Fusion family |
| Power-Up Behavior | — | Functional immediately at power-up (no external boot device) |
| Max Frequency Reference | — | 1098.9 MHz (family listing per Kynix) |