M1AFS250-2PQG208 vs M1AFS250-PQ208 Vergleich
Detaillierter Direktvergleich von M1AFS250-2PQG208 von Microsemi und M1AFS250-PQ208 von Microsemi. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microsemi
M1AFS250-2PQG208 - 250K Gate Fusion Mixed-Signal FPGA | Microsemi
M1AFS250-2PQG208 ✓ AktivSpezifikationsvergleich
| Parameter | M1AFS250-2PQG208 | M1AFS250-PQ208 |
|---|---|---|
| Marke | Microsemi | Microsemi |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $205,00 | $28,60 |
| Logic Cells | 6144 | — |
| System Gates | 250,000 | — |
| RAM Bits | 36864 | — |
| Number of I/O | 93 | 93 |
| Versorgungsspannung | 1.425 V to 1.575 V | — |
| Speed Grade | -2 | — |
| Technology | 130 nm CMOS, flash-based | — |
| Family | Fusion (M1) Mixed-Signal FPGA | — |
| Gehäuse | 208-BFQFP (208-PQFP) | 208-Pin PQFP / BFQFP |
| Montageart | Surface Mount | Surface Mount |
| Junction Temperature Range | 0C to +85C | — |
| Programming Type | In-System Programmable (flash-based, non-volatile) | — |
| Analog Blocks | Yes (configurable analog mixed-signal peripherals) | Configurable analog (ADC inputs, monitoring) per Fusion family |
| Clock Management | On-chip clock generation and management circuitry | On-chip PLL / clock conditioning circuitry |
| RoHS-Status | Compliant (G = RoHS/green suffix) | [DATA_NEEDED: RoHS status] |
| Operating Temperature Ambient | [DATA_NEEDED: ambient operating temperature range] | — |
| Max Operating Frequency | [DATA_NEEDED: maximum system frequency] | — |
| Thermal Resistance theta-JA | [DATA_NEEDED: thermal resistance] | — |
| Logic Gates | — | 250000 gates |
| Fabric Cells / VersaTiles | — | 6144 cells |
| User Flash Memory | — | 36864 bits |
| Core Supply Voltage | — | 1.5 V |
| Process Technology | — | 130 nm flash CMOS |
| Configuration Memory | — | Flash-based, on-chip (nonvolatile) |
| Security | — | 128-bit flash lock, AES decryption |
| Terminal Pitch | — | 0.5 mm |
| Power-Up Behavior | — | Functional immediately at power-up (no external boot device) |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature range] |
| Max Frequency Reference | — | 1098.9 MHz (family listing per Kynix) |