MC9S08DZ60ACLF vs MC9S08DZ128CLF Vergleich

Detaillierter Direktvergleich von MC9S08DZ60ACLF von NXP Semiconductors und MC9S08DZ128CLF von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

NXP Semiconductors
MC9S08DZ128CLF MC9S08DZ128CLF - 8-bit 40MHz S08 MCU, 128KB Flash, CAN | NXP

MC9S08DZ128CLF - 8-bit 40MHz S08 MCU, 128KB Flash, CAN | NXP

MC9S08DZ128CLF Nrnd

Spezifikationsvergleich

Parameter MC9S08DZ60ACLF MC9S08DZ128CLF
Marke NXP Semiconductors NXP Semiconductors
Kategorie Microcontrollers Microcontrollers
Lebenszyklusstatus NRND NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $6,85 $3,92
Core HCS08 (8-bit CISC) HCS08 (8-bit)
Core Frequency 40 MHz (20 MHz bus) —
Program Memory (Flash) 60 KB (60K x 8) —
RAM 4 KB 8 KB
EEPROM / Emulated EEPROM Available (size [DATA_NEEDED: EEPROM size]) —
Operating Voltage 2.7 V to 5.5 V —
Supply Rails 3.3 V / 5 V —
ADC 24-channel, 12-bit, 2.5 us conversion 12-bit, 24-channel, 2.5 us conversion
CAN 1 x CAN 2.0 A/B MSCAN (CAN 2.0A/B), 1 module
LIN Master LIN 2.0 interface —
Communication Peripherals SCI (SPI), IIC, MSCAN —
Timer / PWM Channels Multiple (count [DATA_NEEDED: timer/PWM channel count]) —
LCD Driver Yes (on-chip segment LCD driver) —
Gehäuse 48-LQFP (7x7 mm) 48-LQFP (7x7 mm), 0.5 mm pitch
Betriebstemperatur -40C to +85C (industrial) [DATA_NEEDED: AEC-Q100 grade range] -40C to +85C (industrial)
Montageart Surface Mount Surface Mount
MSL-Level MSL 3 (per JEDEC J-STD-020) 3 (per JEDEC J-STD-020)
RoHS-Status Compliant Compliant
Background Debug Mode (BGND) Yes (on-chip emulation/debug) —
Instruction Set HC08 instruction set with added BGND instruction —
CPU Frequency — 40 MHz
Bus Speed — 20 MHz
Flash Memory — 128 KB (128K x 8)
EEPROM — 2 KB
Versorgungsspannung — 2.7 V to 5.5 V
I/O Pins — 40
Communication Interfaces — 1x SCI (UART), 1x SPI, 1x I2C, 1x MSCAN
Timers/PWM — 6-channel PWM timer module
Debug Interface — On-chip BDM (single-wire background debug)

Datenblätter & Ressourcen

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