MC9S12DJ128CPVE vs MC9S12DJ128MPVE Vergleich
Detaillierter Direktvergleich von MC9S12DJ128CPVE von NXP Semiconductors und MC9S12DJ128MPVE von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MC9S12DJ128CPVE - HCS12 16-bit MCU, 128KB Flash, 112-LQFP | NXP
MC9S12DJ128CPVE Nrnd
Spezifikationsvergleich
| Parameter | MC9S12DJ128CPVE | MC9S12DJ128MPVE |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $19,75 | $19,25 |
| Core | HCS12 | — |
| Datenbusbreite | 16 bit | — |
| Maximale Taktfrequenz | 25 MHz | — |
| Program Memory Size | 128 KB (128K x 8) Flash | — |
| RAM Size | [DATA_NEEDED: RAM size in bytes] | — |
| Gehäuse | 112-LQFP (20 x 20 mm) | 112-LQFP (20x20 mm) |
| Montageart | Surface Mount | Surface Mount |
| Supply Voltage Range | [DATA_NEEDED: VDD min/max] | — |
| Betriebstemperaturbereich | [DATA_NEEDED: -40C to +85C or -40C to +125C] | — |
| SCI (UART) Interfaces | 2 | — |
| SPI Interfaces | 2 | — |
| I2C (Inter-IC Bus) Interfaces | 1 | — |
| ADC Channels | 2 x 8-channel, 10-bit | — |
| PWM Channels | 8 | 8 |
| Enhanced Capture Timer Channels | 8 (IC/OC) | — |
| Digital I/O Pins | 20 | 59 |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant |
| Lebenszyklusstatus | NRND (Not Recommended for New Designs) | — |
| Core Architecture | — | HCS12 (16-bit CISC) |
| Program Memory (Flash) | — | 128 KB (128K x 8) |
| RAM | — | 8 KB |
| EEPROM | — | 2 KB |
| Maximum CPU Clock | — | 25 MHz (50 MHz internal bus via PLL, see datasheet) |
| Versorgungsspannung | — | 2.35 V to 2.75 V (single 2.5V nominal) |
| ADC | — | 2x 8-channel, 10-bit |
| SCI (UART) | — | 2 |
| SPI | — | 1 |
| I2C (Inter-IC Bus) | — | 1 |
| Betriebstemperatur | — | -40C to +125C (automotive grade) |
| MSL-Level | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Debug Interface | — | BDM (Background Debug Mode) |