MPC563CVR40-FR vs MPC561CZP40 Vergleich
Detaillierter Direktvergleich von MPC563CVR40-FR von NXP Semiconductors und MPC561CZP40 von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MPC563CVR40-FR - 32-Bit 40MHz 512KB Flash MCU 388-PBGA | NXP
MPC563CVR40-FR ✗ AbgekündigtNXP Semiconductors
MPC561CZP40 - 40MHz PowerPC Qorivva MCU, 388-PBGA | NXP
MPC561CZP40 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | MPC563CVR40-FR | MPC561CZP40 |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Ende des Lebenszyklus | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $68,40 | $51,75 |
| Core Architecture | PowerPC e200 (MPC56xx) | PowerPC (MPC5xx / Qorivva family) |
| Core Count | Single-core | Single-core |
| Datenbusbreite | 32-bit | 32-bit |
| Maximum CPU Clock | 40 MHz | — |
| Program Flash Memory | 512 KB (512K x 8) | — |
| Gehäuse | 388-PBGA (27x27 mm) | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Betriebstemperatur | -40C to +85C | — |
| Versorgungsspannung | 2.6V / 5V (mixed) | — |
| I/O Voltage | 5 V | — |
| Series | MPC563 (Qorivva, Green Oak) | — |
| Communication Interfaces | Multiple CAN 2.0B, SPI, SCI | — |
| On-chip Peripherals | TPU, QADC, timers, PWM | — |
| MSL-Level | 3 (168 hours) | MSL3 (typical for large PBGA) |
| RoHS-Status | [DATA_NEEDED: RoHS status] | — |
| Automotive Grade | Yes | AEC-Q100 Grade compliant (Automotive) |
| Maximale Taktfrequenz | — | 40 MHz |
| Program Memory Type | — | ROMless (no internal Flash) |
| Package Type | — | 388-PBGA (Plastic Ball Grid Array) |
| Package Dimensions | — | 27 x 27 mm |
| Betriebstemperaturbereich | — | -40C to +85C |
| Supply Voltage Range | — | [DATA_NEEDED: Vcore/Vio supply range] |
| On-chip SRAM Size | — | [DATA_NEEDED: SRAM bytes] |
| External Bus Interface | — | Yes (32-bit bus, chip-selects via SIU) |
| ADC Channels | — | QADC (Queued ADC) - multi-channel |
| Timer Processing Unit | — | TPU - integrated motion-control timer |
| Peripheral Pin Multiplexing | — | Yes (SIU-controlled routing) |
| Lead-free / RoHS | — | Lead-free finish; RoHS compliance varies by date code |