MPC8536EAVTATHA vs MPC8536EAVTATHA557 Vergleich
Detaillierter Direktvergleich von MPC8536EAVTATHA von NXP Semiconductors und MPC8536EAVTATHA557 von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MPC8536EAVTATHA - PowerQUICC III 1.25GHz 32-Bit MPU | NXP
MPC8536EAVTATHA ✓ AktivNXP Semiconductors
MPC8536EAVTATHA557 - PowerQUICC III 1.25GHz e500 MPU | NXP
MPC8536EAVTATHA557 ✓ AktivSpezifikationsvergleich
| Parameter | MPC8536EAVTATHA | MPC8536EAVTATHA557 |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | Microcontrollers | DSP |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $132,75 | $1,75 |
| Manufacturer | NXP Semiconductors (formerly Freescale) | — |
| Processor Type | MPC85xx PowerQUICC III, 32-Bit PowerPC e500 | PowerPC e500 Microprocessor IC MPC85xx |
| Core Count | 1 | — |
| Core Frequency | 1.25 GHz | 1.25 GHz |
| Core Architecture | PowerPC e500, superscalar | PowerPC e500 (32-bit, dual-issue superscalar) |
| Operating Voltage (Core) | 1 V | 1.0 V |
| I/O Voltage | 1.5V / 1.8V / 2.5V / 3.3V | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Memory Controller | DDR2 / DDR3 with ECC | DDR2 / DDR3 with ECC support |
| Ethernet | 2x Gigabit (SGMII) | — |
| SATA | 2x SATA (multiplexed with SGMII) | — |
| PCI / PCIe | PCI and PCIe interfaces | — |
| Storage I/O | SD / MMC (SDHC) | — |
| Security Engine | SEC 4.0 (AES, 3DES, hashing, RNG) | DES / 3DES / AES / Public-key acceleration |
| Hardware Timestamping | IEEE 1588 | — |
| Gehäuse / Bauform | 783-FCPBGA (29x29 mm) | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Betriebstemperatur | 0C to +90C | -40C to +105C |
| RoHS-Status | Compliant | Compliant |
| Number of Cores | — | 1 |
| Gehäuse | — | 783-FCPBGA (29x29 mm) |
| Ethernet Controllers | — | 4 x 10/100/1000 Mbps eTSEC |
| PCI Express Lanes | — | PCIe Gen 2 x4 |
| Lead-Free Status | — | Lead-Free [DATA_NEEDED: reflow profile] |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| JTAG Support | — | JTAG / COP / BDI debug interface |
| L1 Cache | — | 32 KB instruction + 32 KB data |