MPC860DPZQ80D4 vs MPC860DPZQ66D4 Vergleich
Detaillierter Direktvergleich von MPC860DPZQ80D4 von NXP Semiconductors und MPC860DPZQ66D4 von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MPC860DPZQ80D4 - PowerQUICC MPC860 80MHz 32-Bit MPU | NXP
MPC860DPZQ80D4 ObsoleteNXP Semiconductors
MPC860DPZQ66D4 - 66MHz PowerQUICC MPU 357-PBGA | NXP
MPC860DPZQ66D4 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | MPC860DPZQ80D4 | MPC860DPZQ66D4 |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $13,85 | $25,28 |
| Processor Type | MPC8xx PowerQUICC, 32-bit RISC MPU | MPC8xx PowerQUICC 32-Bit RISC MPU |
| Core Architecture | PowerPC 603-class single core | — |
| Maximum Core Clock | 80 MHz | — |
| Core Voltage | 2.2 V | — |
| I/O Voltage | 3.3 V | — |
| Process Technology | 0.32 um CMOS | — |
| Communications Processor Module (CPM) | Integrated 32-bit RISC CPM with SCC/SMC | — |
| Serial Communication Controllers (SCC) | Up to 4 channels (Ethernet, HDLC, UART) | — |
| Serial Management Controllers (SMC) | 2 channels (UART/SPI/I2C) | — |
| Ethernet MAC | 10/100 Mbps Fast Ethernet | — |
| DMA Channels | 4 channels | — |
| Memory Controller | Integrated, up to 4 DRAM banks | — |
| Gehäuse / Bauform | 357-PBGA (25x25 mm) | 357-Ball PBGA, 25 x 25 mm |
| Montageart | Surface Mount | — |
| Packaging | Tray | Tray |
| Lead Status | Contains Lead | — |
| RoHS-Status | Non-Compliant | Non-RoHS (legacy BGA, contains lead) |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial grade) |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Core | — | 1 Core, 32-Bit PowerPC |
| Operating Frequency | — | 66 MHz |
| Core / I/O Voltage | — | 3.3 V |
| L1 Instruction Cache | — | 4 Kbyte |
| L1 Data Cache | — | 4 Kbyte |
| On-chip RAM (per data sheet) | — | [DATA_NEEDED: internal SRAM size] |
| Co-Processor / DSP | — | Communications Processor Module (CPM) |
| Ethernet | — | 10 Mbps (via CPM, Fast Ethernet not supported on DP variant) |
| DRAM Controller | — | Yes, up to 256 Mbyte addressable |
| Address Bus Width | — | 32-Bit |
| Lead-Free Status | — | Contains Lead |
| Part Status | — | Not For New Designs |