MSC8151TAG1000B vs MSC8156ESAG1000B Vergleich
Detaillierter Direktvergleich von MSC8151TAG1000B von NXP Semiconductors und MSC8156ESAG1000B von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MSC8151TAG1000B - SC3850 1GHz DSP, 783-FCPBGA | NXP Semiconductors
MSC8151TAG1000B ObsoleteNXP Semiconductors
MSC8156ESAG1000B - 6x SC3850 1GHz DSP SoC | NXP Semiconductors
MSC8156ESAG1000B ✗ AbgekündigtSpezifikationsvergleich
| Parameter | MSC8151TAG1000B | MSC8156ESAG1000B |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | DSP | DSP |
| Lebenszyklusstatus | Obsolete | Ende des Lebenszyklus |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $124,00 | $112,00 |
| Part Number | MSC8151TAG1000B | — |
| Manufacturer | NXP Semiconductors | — |
| Series | StarCore | — |
| Product Type | SC3850 Single-Core Digital Signal Processor (DSP) | — |
| Core Architecture | StarCore SC3850 (1 core) | — |
| Clock Rate | 1 GHz | — |
| L1 Instruction Cache | 32 kB | — |
| L1 Data Cache | 32 kB | — |
| L2 Unified Cache | 512 kB (M2 in 64 kB increments) | — |
| On-Chip RAM (total) | 576 kB | — |
| ROM | 96 kB | — |
| Memory Management | MMU + EPIC (Extended Programmable Interrupt Controller) | — |
| Hardware Accelerator | MAPLE-B (Turbo/Viterbi FEC) | MAPLE-B baseband accelerator (turbo decode) |
| Core Voltage | 1.00 V | — |
| I/O Voltage | 2.50 V | — |
| Gehäuse | 783-FCBGA (FC-PBGA, 29x29 mm) | 783-ball FCBGA (29x29 mm) |
| Operating Interfaces | Ethernet, I2C, PCI, RGMII, Serial RapidIO, SGMII, SPI, UART/USART | — |
| Timers | Two general-purpose 32-bit | — |
| Power States | Wait, Stop, Debug modes | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0C to +105C |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Part Status | Obsolete | — |
| DSP Cores | — | 6x SC3850 StarCore cores |
| Core Clock Frequency | — | 1 GHz per core |
| Aggregate Performance | — | [DATA_NEEDED: aggregate MMACS rating] |
| Process Technology | — | 45 nm CMOS |
| Memory Controller | — | 64-bit DDR2/DDR3, up to 800 MT/s |
| SerDes Lanes | — | 2 lanes, SRIO or PCIe (selectable) |
| Ethernet | — | 1x Gigabit Ethernet MAC |
| Packet Engine | — | QUICC Engine subsystem |
| Security Engine | — | SEC 4.0 (Cryptographic accelerator) |
| Versorgungsspannung | — | [DATA_NEEDED: core and I/O rail voltages] |
| RoHS-Status | — | [DATA_NEEDED: RoHS compliance] |
| Lebenszyklusstatus | — | End of Life (per NXP PCN) |