P3041NSN1MMB vs P3041NSE1MMB Vergleich
Detaillierter Direktvergleich von P3041NSN1MMB von NXP Semiconductors und P3041NSE1MMB von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | P3041NSN1MMB | P3041NSE1MMB |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $274,50 | $215,00 |
| Architecture | PowerPC e500mc | — |
| Core Count | 4 | — |
| Data Width | 32-bit | — |
| Maximum Core Frequency | 1.2 GHz | 1.2 GHz |
| Series | QorIQ P3041 | QorIQ P3 |
| L2 Cache | 256 KB (shared) | — |
| Memory Controller | DDR3 / DDR3L with ECC (64-bit) | DDR3/DDR3L with ECC [DATA_NEEDED: maximum supported frequency] |
| Gehäuse | 1295-ball FCBGA (FC-PBGA), 37.5 mm x 37.5 mm | — |
| Betriebstemperatur | 0 C to +105 C | — |
| Security Engine (SEC) | Not enabled (NonENC variant) | — |
| Process Node | [DATA_NEEDED: process node] | [DATA_NEEDED: lithography node] |
| Instruction Set Extensions | Power Architecture e500mc, Signal Processing Engine (SPE) | — |
| Ethernet Support | Up to 4x SGMII / 2x RGMII integrated MACs | — |
| PCIe Lanes | PCIe Gen 2.0 (lane count per SKU) | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant | Compliant (lead-free PBGA) |
| Voltage - Core | [DATA_NEEDED: Vcore range] | — |
| Revision | r1.1 | — |
| Manufacturer | — | NXP Semiconductors |
| Core Architecture | — | PowerPC e500mc |
| Number of Cores | — | 4 |
| Datenbusbreite | — | 32-bit |
| Betriebstemperaturbereich | — | 0 C to 105 C |
| Package Type | — | 1295-FCPBGA (37.5 mm x 37.5 mm) |
| Encryption | — | Yes (encrypted secure boot, r1.1) |
| On-chip Crypto Acceleration | — | Yes (IPsec, SSL, SRTP) [DATA_NEEDED: throughput] |
| SerDes Lanes | — | [DATA_NEEDED: lane count and supported protocols] |
| Ethernet Interfaces | — | [DATA_NEEDED: number of SGMII/XAUI ports] |
| PCIe Support | — | Yes [DATA_NEEDED: number of lanes and generation] |
| USB Support | — | [DATA_NEEDED: USB version and host/device role] |
| Typical Power Consumption | — | [DATA_NEEDED: TDP in W] |