RTAX1000SL-CGS624E vs RTAX1000SL-LG624E Vergleich
Detaillierter Direktvergleich von RTAX1000SL-CGS624E von Microchip Technology und RTAX1000SL-LG624E von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
RTAX1000SL-CGS624E - 1M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX1000SL-CGS624E ✓ AktivMicrochip Technology
RTAX1000SL-LG624E - 1M-Gate Rad-Tolerant FPGA 624-LGA | Microchip
RTAX1000SL-LG624E ✓ AktivSpezifikationsvergleich
| Parameter | RTAX1000SL-CGS624E | RTAX1000SL-LG624E |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3.970,00 | $0,00 |
| Equivalent System Gates | 1000000 gates | 1,000,000 |
| Additional ASIC Gates | 125000 gates | — |
| Configurable Logic Blocks (CLBs) | 12096 | — |
| Maximum System Frequency | 581 MHz | — |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-SL Radiation-Tolerant FPGA |
| Gehäuse | 624-ball Ceramic Column Grid Array (CGS624) | 624-Pin LGA (CBGA624), Ceramic |
| Radiation Tolerance | Radiation-tolerant (space-flight qualified family) | — |
| Configuration | Non-volatile anti-fuse, live-at-power-up, single chip | Live-at-power-up (no external configuration device) |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Clocking Features | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Dedicated carry logic | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | [DATA_NEEDED: Operating Temperature] | [DATA_NEEDED: operating temperature range] |
| I/O Count | [DATA_NEEDED: User I/O Count] | — |
| RoHS-Status | [DATA_NEEDED: RoHS Status] | [DATA_NEEDED: RoHS status] |
| ASIC Gates | — | 125,000 |
| Logic Cells (CLBs) | — | 12,096 |
| Maximum Combinatorial Delay per CLB | — | 0.93 ns |
| Maximum Frequency | — | 581 MHz |
| Packaging | — | Box |
| Technology Base | — | CMOS, Antifuse |
| I/O Voltage Range | — | [DATA_NEEDED: I/O voltage range] |
| TID Rating | — | [DATA_NEEDED: total ionizing dose rating] |
| SEU Immunity | — | [DATA_NEEDED: single-event upset immunity figure] |