RTAX1000SL-CGS624V vs RTAX1000SL-1CGS624E Vergleich
Detaillierter Direktvergleich von RTAX1000SL-CGS624V von Microchip Technology und RTAX1000SL-1CGS624E von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
RTAX1000SL-CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-CGS624V ✓ AktivMicrochip Technology
RTAX1000SL-1CGS624E - 1M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX1000SL-1CGS624E ✓ AktivSpezifikationsvergleich
| Parameter | RTAX1000SL-CGS624V | RTAX1000SL-1CGS624E |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3.400,00 | $3.420,00 |
| System Gates | 1,000,000 | 1,000,000 |
| Logic Cells | 18144 | — |
| CLBs | 12096 | — |
| Technology | Digital CMOS antifuse | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | RTAX-S/SL (radiation-tolerant, antifuse) |
| Programmability | One-Time Programmable (antifuse), live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Clock Resources | Segmentable clocks, chip-wide highway routing | — |
| Carry Logic | Yes (dedicated fast carry chain) | — |
| Gehäuse | CGS624 (624-column ceramic grid array) | CGA-624 (ceramic column grid array, 624 pins) |
| Montageart | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | Space flight systems |
| Radiation Tolerance | Radiation-tolerant (TID/SEE per manufacturer qualification) | — |
| Max Family Density | 4,000,000 equivalent system gates | — |
| Base Commercial Family | Axcelerator | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Versorgungsspannung | [DATA_NEEDED: core supply voltage] | — |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| ASIC Gates (embedded) | — | 125,000 |
| Configurable Logic Blocks (CLBs) | — | 12096 |
| Process Technology | — | 0.15 um CMOS |
| Core Supply Voltage | — | 1.5 V |
| Maximum System Performance | — | 581 MHz |
| Speed Grade | — | -1 |
| Programming Technology | — | Antifuse (one-time programmable, live at power-up) |
| SEU Immunity | — | SEU-hardened registers; soft-error rate < 10-10 errors/bit-day |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |
| Embedded FIFO Control | — | Yes |