RTAX2000S-1CGS624V vs RTAX2000S-1CG624PROTO Vergleich
Detaillierter Direktvergleich von RTAX2000S-1CGS624V von Microchip Technology und RTAX2000S-1CG624PROTO von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
RTAX2000S-1CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-1CGS624V ✓ AktivMicrochip Technology
RTAX2000S-1CG624PROTO - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-1CG624PROTO ✓ AktivSpezifikationsvergleich
| Parameter | RTAX2000S-1CGS624V | RTAX2000S-1CG624PROTO |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3.950,00 | $0,00 |
| Family | RTAX-S Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGA |
| Equivalent System Gates | 2,000,000 | 2000000 |
| Configurable Logic Blocks (CLBs) | 21,504 | 21504 |
| Total Logic Cells | 32,256 | — |
| ASIC Gate Capacity (companion) | 250,000 gates | — |
| Core Supply Voltage (nominal) | 1.5 V | — |
| Core Supply Voltage Range | 1.425 V to 1.575 V | — |
| Logic Family | CMOS | — |
| Speed Grade | -1 | -1 |
| Betriebstemperatur | -55C to +125C | [DATA_NEEDED: operating temperature range] |
| Gehäuse | CG624 Ceramic Column Grid Array (CCGA), 624 balls | CCGA-624 (CG624 ceramic column grid array) |
| Montageart | Surface Mount | Surface Mount |
| Programming Technology | Antifuse (one-time programmable) | — |
| SEU Hardening | SEU-hardened registers, immune to single-event upsets | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | 540 kbits (family max, with optional EDAC) |
| Configuration | Live at power-up, single-chip (no external config device) | Live at power-up (nonvolatile antifuse) |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Weight | [DATA_NEEDED: package weight] | — |
| Logic Cells | — | 32256 |
| User I/Os (family max) | — | 684 |
| Total Ionizing Dose (functional) | — | 300 krad (Si) |
| Total Ionizing Dose (parametric) | — | 200 krad (Si) |
| SEU Rate | — | Less than 1E-10 errors per bit-day |
| Maximum System Frequency | — | 350 MHz (family performance) |
| Technology | — | CMOS antifuse (one-time programmable) |
| Qualification Flow | — | PROTO (engineering prototype) |