RTAX4000D-CQ352EV vs RTAX4000D-CQ352E Vergleich
Detaillierter Direktvergleich von RTAX4000D-CQ352EV von Microchip Technology und RTAX4000D-CQ352E von Microsemi. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
RTAX4000D-CQ352EV - 4M-Gate Rad-Tolerant FPGA CQFP-352 | Microchip
RTAX4000D-CQ352EV ✓ AktivMicrosemi
RTAX4000D-CQ352E - 4M Gate Rad-Tolerant FPGA CQFP-352 | Microchip
RTAX4000D-CQ352E ✓ AktivSpezifikationsvergleich
| Parameter | RTAX4000D-CQ352EV | RTAX4000D-CQ352E |
|---|---|---|
| Marke | Microchip Technology | Microsemi |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $0,00 |
| Family | RTAX-DSP Radiation-Tolerant FPGA | RTAX-DSP Radiation-Tolerant FPGA |
| Equivalent System Gates | 4,000,000 | — |
| Logic Cells | 33,600 | 33,600 |
| CLB Organization | 36,960 CLBs | — |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Core Supply Voltage | 1.5 V nominal (1.425 V to 1.575 V) | 1.5 V |
| Gehäuse | 352-Pin Ceramic CQFP | 352-Pin CQFP (CQ352) ceramic, hermetic |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | -55C to +125C | [DATA_NEEDED: operating temperature range] |
| Combinatorial CLB Delay | [DATA_NEEDED: combinatorial CLB delay] | — |
| Embedded Memory | Embedded SRAM with FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Configuration | Live at power-up, single-chip | Live at power-up (antifuse, single-chip) |
| Radiation Tolerance | Radiation-tolerant (space flight) [DATA_NEEDED: TID/SEE levels] | Radiation-tolerant, space-flight qualified family (per Microchip RTAX-DSP product page) |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - hermetic ceramic aerospace package, typically exempt] |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| System Gates | — | 4,000,000 |
| Clocking | — | Segmentable clocks, chip-wide highway routing |
| Number of CLBs | — | [DATA_NEEDED: CLB / AX cell organization count] |
| User I/O Count | — | [DATA_NEEDED: user I/O count for CQ352 package] |
| Speed Grade | — | Standard (no dash-1 speed suffix indicated in CQ352E ordering code) |
| Design Software | — | Microsemi/Microchip Libero SoC |