SN74LVC1G125DBVR vs SN74LVC1G07DBVR Vergleich
Detaillierter Direktvergleich von SN74LVC1G125DBVR von Texas Instruments und SN74LVC1G07DBVR von Texas Instruments. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Texas Instruments
SN74LVC1G125DBVR - 1.65-5.5V 3-State Buffer Gate | TI | SOT-23-5
SN74LVC1G125DBVR ✓ AktivTexas Instruments
SN74LVC1G07DBVR - Open-Drain Buffer 1.65-5.5V SOT-23-5 | TI
SN74LVC1G07DBVR ✓ AktivSpezifikationsvergleich
| Parameter | SN74LVC1G125DBVR | SN74LVC1G07DBVR |
|---|---|---|
| Marke | Texas Instruments | Texas Instruments |
| Kategorie | Logic ICs | Logic ICs |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,13 | $0,19 |
| Funktion | Single non-inverting buffer / line driver | Single non-inverting buffer/driver |
| Logic Family | LVC (Low-Voltage CMOS) | — |
| Number of Elements | 1 | — |
| Bits per Element | 1 | — |
| Ausgangstyp | 3-State | Open drain |
| Supply Voltage (VCC) | 1.65 V to 5.5 V | — |
| Input Voltage Tolerance | Up to 5.5 V (independent of VCC) | — |
| Maximum Quiescent Current (ICC) | 10 uA | — |
| Output Drive (IOUT) | +/-24 mA at 3.3 V | — |
| Output Enable | Active-low OE (high = Hi-Z) | — |
| Ioff / Partial-Power-Down | Supported | — |
| Propagation Delay (tpd) | Specified at 3.3 V (see datasheet) | — |
| Betriebstemperatur | -40C to +125C | -40C to +125C |
| Gehäuse | SOT-23-5 (DBV) | SOT-23-5 (DBV) SC-74A / SOT-753 |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | 1 (260C, unlimited) | 1 |
| RoHS-Status | ROHS3 Compliant | Compliant |
| Supply Voltage Range | — | 1.65 V to 5.5 V |
| Max Input Voltage | — | 5.5 V |
| Max Open-Drain Output Voltage | — | 5.5 V |
| Max Sink Current | — | 32 mA |
| Output Drive at 3.3 V | — | ±24 mA |
| Max Propagation Delay | — | 3.3 ns at 3.3 V |
| Max Quiescent Current ICC | — | 10 uA |
| Ioff Partial-Power-Down | — | Supported |
| Kanäle | — | 1 Element, 1 Bit per Element |
| Polarity | — | Non-inverting |