XC2C64A-7CP56C vs XC2C64A-7CP56I Vergleich
Detaillierter Direktvergleich von XC2C64A-7CP56C von AMD und XC2C64A-7CP56I von AMD. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | XC2C64A-7CP56C | XC2C64A-7CP56I |
|---|---|---|
| Marke | AMD | AMD |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Device Type | CoolRunner-II complex programmable logic device | CoolRunner-II complex programmable logic device |
| Macrocell Count | 64 macrocells | — |
| Equivalent Logic Capacity | 1.5K gates | — |
| Internal Frequency | 333 MHz | 333 MHz |
| Propagation Delay | 5 ns | — |
| Pin-to-Pin Logic Delay | 4.6 ns | 4.6 ns |
| User I/O Count | 45 I/Os | — |
| Logic Family | CMOS | CMOS |
| Process Technology | 0.18 µm CMOS | — |
| Core Supply Voltage | 1.8 V | — |
| Ruhestrom | 15 µA | 15 A as stated in the verified source |
| Package Type | CSP-56, 6 x 6 mm, 0.50 mm pitch | CSP-56 |
| Pin-Anzahl | 56 pins | — |
| Montageart | Chip-scale surface-mount package | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| RoHS Compliance | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| REACH Compliance | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH compliance status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 status] | [DATA_NEEDED: AEC-Q100 qualification status] |
| Number of Macrocells | — | 64 macrocells |
| Maximum Propagation Delay | — | 6.7 ns |
| Stated Propagation Delay | — | 5 ns |
| User I/Os | — | 45 pins |
| Total Package Pins | — | 56 pins |
| Internal Supply Voltage | — | 1.7 V to 1.9 V |
| Logic Technology | — | 0.18 micron CMOS |
| Programmable Type | — | In-system programmable |
| Package Dimensions | — | 6 x 6 mm |
| Package Pitch | — | 0.50 mm |