XC3090L-7TQG176I vs XC3090L-7TQG176C Vergleich
Detaillierter Direktvergleich von XC3090L-7TQG176I von Xilinx und XC3090L-7TQG176C von Xilinx. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Xilinx
XC3090L-7TQG176I - 3200 Gates FPGA, 176-pin TQG, -40C to +100C | Xilinx
XC3090L-7TQG176I Obsolete
Spezifikationsvergleich
| Parameter | XC3090L-7TQG176I | XC3090L-7TQG176C |
|---|---|---|
| Marke | Xilinx | Xilinx |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $64,80 | $21,20 |
| Series | XC3000L (Low-Voltage) | — |
| Family | XC3000L Field Programmable Gate Array | XC3000L |
| Usable Gates | 3200 | 5,000 (typical, up to 9,000 peak) |
| Configurable Logic Blocks (CLBs) | 100 | — |
| Flip-Flops | 144 | — |
| Maximum User I/O | 176 | — |
| Logic Cells | [DATA_NEEDED: logic cell count] | — |
| Core Supply Voltage (Vcc) | 3.0 V to 3.6 V (3.3 V typical) | — |
| I/O Supply Voltage (Vcco) | 3.3 V or 5.0 V tolerant | — |
| Process Technology | 0.6 um CMOS SRAM | 0.8 micron CMOS |
| Speed Grade | -7 | — |
| Temperature Grade (I) | -40C to +100C (Industrial) | — |
| Gehäuse | TQG-176 (Thin Quad Gulp, 176-pin) | 176-pin TQFP (TQG176), 1.4 mm height, surface-mount |
| Montageart | Surface Mount | Surface Mount |
| Configuration Interface | JTAG (IEEE 1149.1) + XACT parallel | — |
| On-chip RAM | Distributed SelectRAM | — |
| RoHS-Status | Compliant | unknown |
| Lead-Free | Yes | — |
| Device | — | XC3090L |
| Logic Cells / CLBs | — | 100 CLBs (320 F-FFs) |
| User I/O Count | — | 144 (maximum, TQG176) |
| Configuration Memory | — | SRAM (volatile, requires external PROM) |
| Supply Voltage (Core) | — | 3.0 V to 3.6 V |
| Supply Voltage (I/O VCCO) | — | 3.0 V to 3.6 V |
| Logic Cell Toggle Delay | — | approximately 1.3 to 1.5 ns (-7 speed grade) |
| Betriebstemperaturbereich | — | 0C to +85C (C suffix, commercial) |
| Configuration Mode | — | Serial (master/slave) and JTAG (IEEE 1149.1) |
| MSL-Level | — | 3 (168 hours) [DATA_NEEDED: confirm per package marking] |
| Lead-Free / Lead Content | — | [DATA_NEEDED] |
| Configuration Clock Source | — | Internal oscillator amplifier or external pin |
| Output Drive (per I/O) | — | 8 mA source / 24 mA sink (typical, datasheet TBD by speed grade) |