XDPP1140100BXUMA1 vs XDPE19283D0000XTMA1 Vergleich
Detaillierter Direktvergleich von XDPP1140100BXUMA1 von Infineon und XDPE19283D0000XTMA1 von Infineon. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Infineon
XDPP1140100BXUMA1 - 32-bit Digital DC-DC Controller, VQFN-24 | Infineon
XDPP1140100BXUMA1 ✓ Aktiv
Spezifikationsvergleich
| Parameter | XDPP1140100BXUMA1 | XDPE19283D0000XTMA1 |
|---|---|---|
| Marke | Infineon | Infineon |
| Kategorie | DC-DC Converters | DC-DC Converters |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,20 | $7,95 |
| Topology Support | Hard-switched full-bridge, half-bridge, push-pull, active-clamp forward, LLC | — |
| Modulation | PWM and LLC | — |
| MCU Core | 32-bit ARM Cortex-M0 | — |
| Maximum Switching Frequency | 2 MHz | — |
| Supply Voltage (VDD) | 2.97 V to 3.63 V | — |
| Betriebstemperatur | -40C to +125C | [DATA_NEEDED: operating temperature range] |
| Gehäuse | PG-VQFN-24-20 (VQFN-24, 4 mm x 4 mm) | PG-VQFN-40-13 (40-pin QFN, 5x5 mm) with exposed pad |
| Phase Support | Single phase, multi-phase with flux balancing | — |
| Gate Drive Outputs | Integrated drivers for synchronous-rectifier FETs | — |
| Analog Protection | Programmable comparators for cycle-by-cycle OCP | — |
| Communication Interfaces | I2C / UART / PMBus-compatible | — |
| Internal ADC | Multi-channel ADC for VIN/VOUT/IIN/IOUT/TEMP monitoring | — |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | MSL per JEDEC J-STD-020 (see datasheet) | [DATA_NEEDED: MSL level] |
| RoHS-Status | Compliant | Compliant (per Infineon product page) |
| Tape and Reel Quantity | 5000 per reel | — |
| Topologie | — | Digital multiphase buck controller |
| Number of Loops | — | 2 (dual-loop) |
| Maximum Phases | — | 8 (configurable 8+0, 7+1, 6+2, 5+3, 4+4) |
| Ausgangsspannungsbereich | — | 0.25 V to 2.8 V |
| Switching Frequency Range | — | 250 kHz to 3000 kHz |
| Supported Protocol | — | AMD SVI3 |
| Communication Interface | — | PMBus / I2C (command and monitor) |
| Protection Features | — | OVP, UVP, OCP, OTP (per datasheet) |
| Current Balancing | — | Per-phase digital current sharing |
| Target CPU Platform | — | AMD SVI3 server, workstation, high-end desktop |