AD9237BCPZ-20 - 12-Bit 20 MSPS ADC 3V Low Power LFCSP-32
Teilenummer: AD9237BCPZ-20 ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $18.5 | $18,50 |
| 10 | $16.2 | $162,00 |
| 100 | $13.45 | $1.345,00 |
| 500 | $11.2 | $5.600,00 |
| 1.000 | $9.85 | $9.850,00 |
AD9237BCPZ-20 Übersicht
An ADC (analog-to-digital converter) is a data-acquisition integrated circuit that samples continuous analog waveforms and converts them into discrete digital codes for downstream DSP, microcontrollers, or FPGAs. ADCs form a critical link in the signal chain between analog transducers (sensors, antennas, IF stages) and digital processors, and high-speed variants such as the AD9237 typically employ pipelined architectures for high sampling rates at moderate resolution. Within the broader taxonomy, the AD9237BCPZ-20 belongs to the family of pipeline ADCs, which sit between successive-approximation (SAR) ADCs (low-power, multi-MHz) and high-speed flash/serial-lvds ADCs (hundreds of MSPS).
Key differentiating specifications include ultralow power dissipation at 20 MSPS, differential analog inputs with 500 MHz full-power bandwidth, and excellent dynamic performance that includes SNR of up to 66 dBc to Nyquist and SFDR of 80 dBc to Nyquist at 65 MSPS. The part also offers DNL of ±0.7 LSB, an output enable pin for multiplexing, and CMOS-compatible digital outputs. These specifications make it well suited for imaging, communications IF sampling, and portable instrumentation.
Architecturally, the AD9237 uses a multistage differential pipelined topology with output error correction logic. The on-chip reference and SHA minimize external component count, while the selectable input-span feature allows direct coupling to a wide range of op-amp and transformer front ends without external attenuators.
Typical applications include ultrasound and medical imaging front ends, communications IF sampling in software-defined radios, handheld test instruments, and low-power industrial data acquisition modules. Designers often select the AD9237BCPZ-20 when migrating from the pin-compatible AD9235 for additional speed headroom.
A key design consideration is proper layout of the analog and digital grounds and the use of low-noise LDOs on the 3 V supply rail to preserve SNR. The output enable pin should be tied properly to avoid bus contention during multi-ADC multiplexing.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes beyond what the manufacturer's datasheet alone provides.
Drop-in-Alternativen für AD9237BCPZ-20 – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit AD9237BCPZ-20 (gleiche Bauform und Footprint) – abweichend in Package, Architecture, Resolution, Digital Output Interface, Input Type.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
AD9237BCPZ-40
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
AD9237BCPZ-65
✅ Drop-In✓ Auf Lager
$8.04 / Stück
Datenblatt ansehen →AD9235BCPZ-65
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
AD9235BCPZ-40
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
AD9235BCPZ-20
✅ Drop-In ⚠️ Spezifikationen ungeprüft📋 Referenzalternative (nicht im Katalog)
AD9237BCPZ-20 Grenzwerte & elektrische Eigenschaften
| Auflösung | 12 bits |
| Sample Rate | 20 MSPS |
| Number of Channels | 1 |
| Architecture | Pipelined |
| Versorgungsspannung | 3 V (single supply) |
| Input Type | Differential |
| Input Bandwidth | 500 MHz full-power |
| Eingangsspannungsbereich | 1 V p-p to 4 V p-p (selectable) |
| DNL | ±0.7 LSB |
| SNR (to Nyquist) | 66 dBc at 65 MSPS |
| SFDR (to Nyquist) | 80 dBc at 65 MSPS |
| Reference | Internal |
| Output Interface | Parallel CMOS |
| Gehäuse | 32-LFCSP-WQ (5x5 mm) |
| Pin-Anzahl | 32 |
| Temperature Grade | Industrial |
| Montageart | Surface Mount |
| RoHS-Status | Compliant |
AD9237BCPZ-20 Pin-Konfiguration
| Pin 1 | AVDD — 3 V analog supply |
| Pin 2 | AVSS — Analog ground |
| Pin 3 | AIN+ — Differential analog input (non-inverting) |
| Pin 4 | AIN- — Differential analog input (inverting) |
| Pin 5 | SENSE — Input range select (1 V/2 V/4 V p-p) |
| Pin 6 | VREF — Internal reference bypass/override |
| Pin 7 | REFSENSE — Reference mode select |
| Pin 8 | CML — Common-mode level output |
| Pin 9 | DRVDD — 3 V digital output supply |
| Pin 10 | DRVSS — Digital output ground |
| Pin 11 | OE — Output Enable (active high) |
| Pin 12 | D11 — Bit 11 (MSB) parallel output |
| Pin 13 | D10 — Bit 10 parallel output |
| Pin 14 | D9 — Bit 9 parallel output |
| Pin 15 | D8 — Bit 8 parallel output |
| Pin 16 | D7 — Bit 7 parallel output |
| Pin 17 | D6 — Bit 6 parallel output |
| Pin 18 | D5 — Bit 5 parallel output |
| Pin 19 | D4 — Bit 4 parallel output |
| Pin 20 | D3 — Bit 3 parallel output |
| Pin 21 | D2 — Bit 2 parallel output |
| Pin 22 | D1 — Bit 1 parallel output |
| Pin 23 | D0 — Bit 0 (LSB) parallel output |
| Pin 24 | OTR — Out-of-range indicator |
| Pin 25 | CLK — Sample clock input |
| Pin 26 | CLK- — Complementary sample clock input |
| Pin 27 | DFS — Data format select (straight binary / twos complement) |
| Pin 28 | PDWN — Power-down mode input |
| Pin 29 | MUX — Digital output mux mode control |
| Pin 30 | RBIAS — External bias resistor setting |
| Pin 31 | NC — Not connected (per datasheet) |
| Pin 32 | NC — Not connected (per datasheet) |
Typische Anwendungen
AD9237BCPZ-20 ist geeignet für 6 Anwendungs: Medical Ultrasound Imaging Front End, Software-Defined Radio IF Sampling, Portable Test & Measurement Instrumentation, Industrial Data Acquisition Modules, CCD/CMOS Imaging Sensor Digitizers, Radar Pulse-Doppler Baseband Digitizer.
Medical Ultrasound Imaging Front End
The AD9237BCPZ-20's 12-bit resolution at 20 MSPS suits mid-range diagnostic ultrasound beamformer channels where low power dissipation (~60 mW per channel) and good SNR (~66 dBc to Nyquist) directly improve image dynamic range and battery runtime. Its selectable 1-4 V p-p input span lets designers match the gain of the LNA + TGC stage without external attenuators, while the differential 500 MHz input bandwidth preserves harmonic content from pulse-echo returns. Pair with the AD8332 TGC amplifier and an FPGA-based beamformer for a complete 16-64 channel portable ultrasound engine.
Empfohlen
Software-Defined Radio IF Sampling
Place the AD9237BCPZ-20 after a 70 MHz or 140 MHz IF stage in a software-defined radio (SDR) and its 500 MHz input bandwidth captures second-Nyquist aliasing zones while the 12-bit dynamic range handles QAM and OFDM modulation envelopes. The ultralow 20 MSPS power dissipation is ideal for handheld or man-pack SDR platforms, and the parallel CMOS outputs feed directly into an FPGA for digital down-conversion. Differential inputs reject common-mode noise from the mixer IF output transformer, simplifying PCB layout.
Empfohlen
Portable Test & Measurement Instrumentation
In handheld oscilloscope, spectrum analyzer, or bench DMM data-acquisition paths, the AD9237BCPZ-20's 20 MSPS throughput captures repetitive waveforms while its ultralow power budget preserves battery runtime across long field sessions. The 67 dBFS SNR near Nyquist preserves enough dynamic range for clean FFTs and spurious-free measurements, and the LFCSP-WQ 5x5 mm footprint allows dense multi-channel PCB layouts. Combined with a low-noise LDO and a small FPGA, this ADC forms the heart of compact, USB-powered instrumentation.
Empfohlen
Industrial Data Acquisition Modules
Industrial multi-channel data-acquisition boards for vibration, strain-gauge, or process-control monitoring deploy the AD9237BCPZ-20 per channel because its 20 MSPS capability oversamples slow sensor signals for digital decimation filtering and improved effective number of bits (ENOB). The selectable 1-4 V p-p input range adapts to standard ±10 V industrial signals via resistor-divider or instrumentation-amp front ends, while the parallel outputs and output enable pin simplify bus-sharing across multiple ADCs. The wide industrial temperature grade and RoHS compliance suit harsh factory environments.
Empfohlen
CCD/CMOS Imaging Sensor Digitizers
Industrial and machine-vision cameras use the AD9237BCPZ-20 to digitize analog CCD/CMOS sensor output streams at pixel-clock rates up to 20 MHz, preserving 12-bit grayscale fidelity across high frame rates. The differential analog input rejects common-mode switching noise from CMOS sensor clock lines, and the on-chip reference eliminates a drift source from the imaging chain. Synchronous sampling tied to the camera's pixel clock yields flat-field-correctable images with low fixed-pattern noise.
Empfohlen
Radar Pulse-Doppler Baseband Digitizer
Pulsed-Doppler and FMCW radar receivers place the AD9237BCPZ-20 at the I/Q baseband output of the demodulator chain to digitize quadrature IF signals at 20 MSPS per channel, sufficient for short-range automotive and industrial radar. The differential input accepts transformer-coupled I/Q signals directly, the on-chip reference minimizes DC-offset drift across temperature, and the digital output enable pin simplifies time-division multiplexing of multiple radar antenna channels. Combine two AD9237 channels (I/Q) with an FPGA-based FFT engine for real-time Doppler visualization.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für AD9237BCPZ-20 – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | AD9237BCPZ-40 | AD9237BCPZ-65 | AD9235BCPZ-65 | AD9235BCPZ-40 | AD9235BCPZ-20 |
|---|---|---|---|---|---|---|
| Package | 32-LFCSP-WQ (5x5) | 32-LFCSP-WQ (5x5) | 32-LFCSP-WQ (5x5) | 32-LFCSP-WQ (5x5) | 32-LFCSP-WQ (5x5) | 32-LFCSP-WQ (5x5) |
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits |
| Sample Rate | 20 MSPS | 40 MSPS | 65 MSPS | 65 MSPS | 40 MSPS | 20 MSPS |
| Input Range | 1/2/4 V p-p selectable | 1/2/4 V p-p selectable | 1/2/4 V p-p selectable | 1 V p-p fixed | 1 V p-p fixed | 1 V p-p fixed |
| Power Dissipation | ~60 mW at 20 MSPS | ~100 mW at 40 MSPS | ~170 mW at 65 MSPS | ~150 mW at 65 MSPS | ~90 mW at 40 MSPS | ~50 mW at 20 MSPS |
| SNR (to Nyquist) | 67 dBFS at 20 MSPS | 66.5 dBFS at 40 MSPS | 66 dBc at 65 MSPS | 66 dBc at 65 MSPS | 67 dBc at 40 MSPS | 67 dBc at 20 MSPS |
| Input Bandwidth | 500 MHz | 500 MHz | 500 MHz | 500 MHz | 500 MHz | 500 MHz |
Wichtigste Unterscheidungsmerkmale
- Selectable 1/2/4 V p-p input range via SENSE pin (vs. AD9235BCPZ-20)
- Pin-compatible upgrade path to 40 and 65 MSPS (vs. AD9226)
- Ultralow 60 mW power at 20 MSPS (vs. AD9237BCPZ-65)
Designhinweise
Power the AD9237BCPZ-20's AVDD from a low-noise LDO such as the ADP3336 or ADP150, not from a switching regulator directly. The 60 mW total dissipation is small enough that linear regulation is acceptable; switching noise on AVDD will couple through the input network and degrade SNR by 2-4 dB. Decouple AVDD with a 10 uF bulk + 0.1 uF + 10 nF X7R ceramic stack directly at the package pin, and place DRVDD on a separate LDO from the same 3 V source.
The 32-LFCSP-WQ (5x5) package exposes its thermal pad on the bottom face, which must be soldered to a continuous ground copper pour. Use at least 1 square inch of 2 oz copper on the top layer under the part, stitched to the bottom GND plane with 4-6 vias in the thermal pad array. This provides the RF ground return for the differential analog inputs and keeps junction-to-ambient thermal resistance low enough for industrial temperature operation.
Do not leave the SENSE pin floating: it selects between 1 V p-p, 2 V p-p, and 4 V p-p input ranges (and external reference mode when tied through a resistor). A floating SENSE pin produces indeterminate input range, out-of-range codes, and degraded SFDR. Always strap SENSE to DRVDD, AGND, or the correct reference-bypass node per the AD9237 datasheet tables. Also avoid routing the parallel digital bus (D0-D11) under the analog input network - cross-coupling introduces harmonic spurs visible in FFT plots.
Route the differential analog inputs (AIN+ / AIN-) as a tightly coupled 100 ohm differential pair, matched within 0.5 mm over the entire path to the ADC. Use a 2:1 or 1:1 transformer (ADT1-1WT or ADT2-1WT) or a dedicated differential driver (AD8475) to set the common-mode voltage to AVDD/2. Keep the CLK and CLK- traces equal-length and shielded by ground on both sides; skew between them samples the input at random phase, raising SNR floor by 3-6 dB.
Terminate the parallel CMOS outputs with a series 100 ohm resistor at the ADC pin when bus length exceeds 25 mm, to dampen reflections into the FPGA. Place the OTR pin in the same byte group as the data lines so the host can flag overranges without an extra side-band signal. When multiplexing two ADCs onto one bus, sequence the OE pins non-overlapping to prevent shoot-through current and code-corrupting bus contention.
Compliance-Informationen
RoHS and REACH compliant per Analog Devices product page. Lead-free (Z suffix in part number indicates lead-free LFCSP-WQ package). Not AEC-Q100 qualified - see ADI automotive-grade ADC family for automotive needs.
