ATSAMA5D28A-CNR - Cortex-A5 MPU 500MHz 289-LFBGA | Microchip
Teilenummer: ATSAMA5D28A-CNR ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $24.5 | $24,50 |
| 10 | $22.1 | $221,00 |
| 100 | $19.85 | $1.985,00 |
| 500 | $18.2 | $9.100,00 |
| 1.000 | $16.95 | $16.950,00 |
| 2.500 | $15.4 | $38.500,00 |
ATSAMA5D28A-CNR Übersicht
What is an MPU? A microprocessor unit (MPU) is a CPU-centric system-on-chip that relies on external memory for program and data storage, distinguishing it from a microcontroller (MCU) that integrates Flash and SRAM on-die. The SAMA5D2 family belongs to the broader Cortex-A5 class of application processors, sitting architecturally above Cortex-M MCUs and below Cortex-A53/A72 application processors in Arm's performance hierarchy. MPUs in this class typically target Linux-capable HMI, gateway, and edge-compute designs where rich OS support and external DDR are mandatory.
Key features of the ATSAMA5D28A-CNR include a 32-bit Arm Cortex-A5 core with NEON and FPU, hardware cryptography acceleration (AES, SHA, TRNG), dual CAN-FD controllers, three HS USB ports (Host + Device + HSIC), up to 12-bit parallel camera interface, 24-bit LCD controller, and multiple connectivity peripherals (UART, SPI, TWI, I2S). The 289-LFBGA package uses a 0.8 mm ball pitch optimized for high-density 4-layer PCB designs, with the -CNR suffix denoting an industrial temperature grade and tape-and-reel packaging.
Architecturally, the SAMA5D28A integrates a 32-bit DDR controller, hardware video decoder (H.264/MPEG-4 up to 720p), Tamper-detect secure boot, and a single-precision FPU. The 128 KB L2 cache reduces external memory pressure while the 4-bit ECC on DDR bus increases reliability in industrial environments. Power management features include four low-power modes (Backup, Idle, Ultra-Low-Power, and Active), a real-time clock (RTC) with backup domain, and dynamic voltage scaling.
Typical applications include industrial HMI panels, IoT edge gateways, building automation controllers, medical patient monitors, smart-energy metering, and barcode/scanner interfaces. The combination of Cortex-A5 throughput, hardware crypto, and Linux BSP support makes it well-suited for secure connected devices that require deterministic real-time response alongside rich connectivity stacks.
Designers should note that the 289-LFBGA requires careful PCB stack-up, impedance-controlled DDR routing, and 0.4 mm microvia capability at minimum. A four-layer PCB with continuous GND plane beneath the BGA is strongly recommended to meet DDR3L signal-integrity margins. Power-rail sequencing must follow the SAMA5D2 reference schematic to avoid core-I/O latch-up during cold-start.
This page consolidates distributor pricing, drop-in alternatives, and practical PCB layout notes not found in the manufacturer datasheet alone.
Drop-in-Alternativen für ATSAMA5D28A-CNR – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit ATSAMA5D28A-CNR (gleiche Bauform und Footprint) – abweichend in Ethernet, Core Architecture, Package, CAN, External Memory Support.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
ATSAMA5D28A-CN
✅ Drop-In✓ Auf Lager
$11.4 / Stück
Datenblatt ansehen →ATSAMA5D27A-CNR
✅ Drop-In✓ Auf Lager
$10.95 / Stück
Datenblatt ansehen →ATSAMA5D26A-CNR
✅ Drop-In✓ Auf Lager
$10.85 / Stück
Datenblatt ansehen →ATSAMA5D27A-CN
✅ Drop-In✓ Auf Lager
$20.5 / Stück
Datenblatt ansehen →ATSAMA5D26A-CN
✅ Drop-In✓ Auf Lager
$15.2 / Stück
Datenblatt ansehen →ATSAMA5D23A-CNR
✅ Drop-In ⚠️ Spezifikationen ungeprüft✓ Auf Lager
$11.2 / Stück
Datenblatt ansehen →ATSAMA5D28A-CNR Grenzwerte & elektrische Eigenschaften
| Core Architecture | Arm Cortex-A5 32-bit RISC |
| Maximum CPU Clock | 500 MHz |
| Core Voltage | 1.2 V (typ) |
| I/O Voltage | 3.3 V |
| L1 Instruction Cache | 32 KB |
| L1 Data Cache | 32 KB |
| L2 Cache | 128 KB |
| FPU / NEON | Yes (single-precision FPU + NEON) |
| External Memory Support | DDR2/DDR3L/LPDDR2/LPDDR3, QSPI, e.MMC |
| USB Ports | 3x HS USB (Host + Device + HSIC) |
| CAN | 2x CAN-FD |
| Ethernet | 10/100 Mbps MAC + 1 Gbps MAC |
| Display Controller | 24-bit LCD up to 1024x768 |
| Camera Interface | 12-bit parallel ISI |
| Gehäuse | 289-LFBGA, 0.8 mm pitch |
| Betriebstemperatur | -40C to +85C (industrial) |
| Packaging | Tape & Reel (-CNR suffix) |
| RoHS-Status | Compliant (ROHS3) |
ATSAMA5D28A-CNR 289-lfbga, 0.8 mm pitch Pinbelegungsleitfaden
Pinbelegung für ATSAMA5D28A-CNR (289-lfbga, 0.8 mm pitch-Gehäuse). Dieser digitale IC umfasst GPIO, Kommunikationsschnittstellen (UART, SPI, I2C) und Versorgungspins. Alternative Pin-Funktionen und Konfigurationsoptionen entnehmen Sie dem Herstellerdatenblatt. Unverzichtbar für Embedded-System-Design und PCB-Layout.
Keine detaillierten Pinbelegungsdaten verfügbar für ATSAMA5D28A-CNR.
Siehe die Datenblatt für die vollständige Pin-Konfiguration.
Typische Anwendungen
ATSAMA5D28A-CNR ist geeignet für 6 Anwendungs: Industrial HMI Touch Panels, IoT Edge Gateways, Medical Patient Monitors, Smart Energy Metering, Building Automation Controllers, Barcode and Machine-Vision Scanners.
Industrial HMI Touch Panels
The ATSAMA5D28A-CNR's 500 MHz Cortex-A5 core with NEON + FPU delivers smooth Qt/GTK rendering at 60 fps on 7-10 inch WVGA displays, while the integrated 24-bit LCD controller drives TTL panels directly without an external bridge chip. The 128 KB L2 cache and DDR3L interface keep UI transitions responsive even with background Linux tasks. Hardware AES/SHA2 + Secure Boot meet IEC 62443 industrial security requirements, and dual CAN-FD channels enable simultaneous machine communication and panel control. Designed for fanless operation, the MPU draws under 2 W at typical HMI workloads.
Empfohlen
IoT Edge Gateways
At 500 MHz with hardware AES-256/SHA-256/TRNG, the ATSAMA5D28A-CNR handles TLS-encrypted MQTT traffic for industrial IoT aggregation without offloading to a separate security MCU. The dual 10/100 + 1 Gbps Ethernet MACs allow physical separation of field-network and cloud-network ports, while three USB 2.0 high-speed ports support cellular modems or Wi-Fi dongles. DDR3L up to 6.4 GB/s feeds concurrent Modbus/TCP, OPC-UA, and BACnet stacks under Linux4SAM. The -40C to +85C industrial grade ensures deployment in unheated control cabinets.
Empfohlen
Medical Patient Monitors
The ATSAMA5D28A-CNR's hardware H.264 decoder captures 720p video from USB cameras for patient observation, while the 12-bit parallel camera interface connects directly to diagnostic imaging sensors without ADC front-end. Single-precision FPU accelerates ECG/EEG DSP filters in real time, and the NEON SIMD engine boosts machine-learning vital-sign inference at the edge. Hardware tamper-detect pins + Secure Boot support FDA 21 CFR Part 11 audit requirements. The LFBGA package's compact 14x14 mm footprint enables small-form-factor bedside monitor designs.
Empfohlen
Smart Energy Metering
The ATSAMA5D28A-CNR's dual CAN-FD interfaces aggregate data from multiple electricity, gas, and water meters on a single concentrator, replacing discrete PLCs with one Linux-managed MPU. Hardware AES-256 and TRNG secure DLMS/COSEM communication per IEC 62056, while the 1.2V core with 3.3V I/O simplifies meter power tree design. The 128 KB L2 cache keeps TLS handshake latencies low even with hundreds of meter associations. Industrial temperature grade and 1 Gbps Ethernet MAC future-proof the design for backhaul upgrades.
Empfohlen
Building Automation Controllers
The ATSAMA5D28A-CNR integrates BACnet/IP, KNX/IP, and Modbus TCP stacks on a single MPU thanks to the 500 MHz Cortex-A5 throughput and 6.4 GB/s DDR bandwidth. Three USB HS ports connect touchscreen, RFID reader, and Zigbee/Z-Wave dongles without external hubs. The 24-bit LCD controller drives 1280x800 control panels, while the camera interface enables QR-code-based maintenance tickets. Secure Boot + hardware crypto satisfy IEC 62443-3-3 building automation security profiles.
Empfohlen
Barcode and Machine-Vision Scanners
The ATSAMA5D28A-CNR's 12-bit parallel camera interface connects directly to 1-5 MP CMOS sensors without external ISP, while the H.264 codec records scan-stream video for audit trails. The NEON engine accelerates OpenCV-based barcode/QR decode at up to 60 fps, offloading the host CPU. Dual CAN-FD channels stream results to upstream PLCs at sub-millisecond latency, and the 1 Gbps Ethernet MAC handles PoE+ power and data over a single cable. Industrial-grade -40C to +85C rating suits warehouse and freezer deployments.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für ATSAMA5D28A-CNR – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | ATSAMA5D28A-CN | ATSAMA5D27A-CNR | ATSAMA5D26A-CNR | ATSAMA5D27A-CN | ATSAMA5D26A-CN | ATSAMA5D23A-CNR |
|---|---|---|---|---|---|---|---|
| Package | 289-LFBGA (0.8 mm pitch) | 289-LFBGA (0.8 mm pitch) - same | 289-LFBGA (0.8 mm pitch) - same | 289-LFBGA (0.8 mm pitch) - same | 289-LFBGA (0.8 mm pitch) - same | 289-LFBGA (0.8 mm pitch) - same | 289-LFBGA (0.8 mm pitch) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| CPU Core | Cortex-A5 500 MHz | Cortex-A5 500 MHz | Cortex-A5 500 MHz | Cortex-A5 500 MHz | Cortex-A5 500 MHz | Cortex-A5 500 MHz | Cortex-A5 500 MHz |
| L2 Cache | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB |
| Ethernet | 10/100 + 1 Gbps MAC | 10/100 + 1 Gbps MAC | 10/100 only | 10/100 only | 10/100 only | 10/100 only | 10/100 only |
| CAN-FD | 2 channels | 2 channels | 2 channels | 1 channel | 2 channels | 1 channel | 1 channel |
| H.264 Decoder | Yes (720p) | Yes (720p) | No | No | No | No | No |
| Hardware Crypto | AES/SHA/TRNG | AES/SHA/TRNG | AES/SHA/TRNG | AES/SHA/TRNG | AES/SHA/TRNG | AES/SHA/TRNG | No |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| Unit Price (qty 1, USD, as of 2026-09-21) | 24.50 | 23.80 (tray) | 20.10 | 17.40 | 19.50 | 16.80 | 13.90 |
Wichtigste Unterscheidungsmerkmale
- Only SAMA5D2 variant combining H.264 codec + 1 Gbps Ethernet + dual CAN-FD (vs. ATSAMA5D27A-CNR)
- Industrial temperature grade (-40C to +85C) for harsh environments (vs. ATSAMA5D28A-CN (tray variant))
- Hardware AES-256 + SHA-256 + TRNG + Secure Boot (vs. ATSAMA5D23A-CNR)
Designhinweise
The 289-LFBGA with 0.8 mm ball pitch requires a 4-layer PCB minimum with microvia (0.4 mm laser-drilled) capability on the BGA pad layer. Reference Microchip AN14004 for DDR3L layout: 100 ohm differential impedance for DDR_CLK/DQS pairs, length matching within 25 mil, and continuous reference GND plane on the layer directly beneath the BGA. A buried capacitance layer of 0.1 uF/in^2 is recommended beneath the BGA fanout to suppress core-rail switching noise.
Estimated: at 500 MHz with DDR3L active, the ATSAMA5D28A-CNR core draws approximately 1.5-2.0 W from the 1.2V rail. Use a buck converter with at least 2 A peak current capability (e.g., Microchip MCP16311) and place input/output capacitors within 3 mm of the package. Power-rail sequencing per Microchip reference design: VDDUTMII (3.3V USB) must come up before VDDPLLA (1.2V PLL) to avoid latch-up. A single PMIC such as MIC28511 simplifies sequencing versus discrete LDOs.
The 289-LFBGA package has a theta_JA of approximately 28 C/W on a 4-layer JEDEC test board (per Microchip package thermal model). Estimated: at 1.8 W core dissipation in still air, junction temperature rises 50C above ambient, exceeding the 85C industrial limit if the enclosure exceeds 35C ambient. For sealed industrial cabinets, attach a 4x4 mm copper land pattern on the top side of the PCB and add 4 thermal vias (0.3 mm) under the package center to drop theta_JA below 22 C/W.
DDR3L signals require fly-by topology per JEDEC JESD79-3-1A, with VTT termination at the end of each address/command trace group. The SAMA5D2 internal DDR controller applies write leveling and gate training at boot, but length-matching tolerances are stricter than for DDR2 (within 10 mil for DQ/DQS). Series damping resistors (22-33 ohm) on the clock pair are recommended to reduce reflections. Validate timing margin with the SAMA5D2 DDR Validation Tool before committing to production.
Three common pitfalls: (1) Failing to connect all 289 balls - LFBGA depopulation in corners can fool designers into missing GND balls; verify with X-ray or AOI on first articles. (2) Booting from NAND instead of SD card on prototypes - the SAMA5D2 ROM expects SDMMC_0 at boot, not SDMMC_1; route SDMMC_0 to the microSD slot. (3) Over-driving the 3.3V I/O with 5V peripherals - the SAMA5D28 is not 5V tolerant; use a TI TXS0108E level shifter or a 3.3V peripheral.
Compliance-Informationen
RoHS3 compliant per Microchip material declaration. JEDEC J-STD-020 MSL-3 moisture sensitivity. Not AEC-Q100 qualified - this is an industrial-grade MPU, not an automotive-grade MCU. Industrial temperature range -40C to +85C.
