MAX120CWG - 500ksps 12-Bit ADC w/ T/H & Reference | Maxim Integrated
Teilenummer: MAX120CWG ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $32.85 | $32,85 |
| 10 | $29.5 | $295,00 |
| 100 | $26.4 | $2.640,00 |
| 500 | $23.75 | $11.875,00 |
| 1.000 | $21.2 | $21.200,00 |
MAX120CWG Übersicht
A successive-approximation ADC is a sampling data converter that resolves a single analog input to N bits in N clock cycles using a binary-weighted capacitor DAC and comparator. Each conversion begins with the internal track/hold acquiring the input, then the SAR logic tests bits from MSB to LSB while the comparator output drives the successive-approximation register. SAR ADCs offer deterministic latency and excellent DC accuracy, making them a workhorse for multiplexed data-acquisition front ends, instrumentation loops, and DSP-based control systems.
Key features of the MAX120CWG include 12-bit resolution with no missing codes over the industrial 0°C-±70°C range, ±1/2 LSB integral nonlinearity (INL) in grade-A parts, ±25 ppm/°C gain drift, and a track/hold with 100 ps aperture delay. The device uses a BiCMOS process that combines bipolar input/track-hold linearity with CMOS digital logic, and includes a high-bandwidth input buffer option that supports input impedances above 1 kΩ. Throughput is 500,000 conversions per second with a 73 dB SINAD and 70 dB THD, and power consumption is 90 mW typical at full speed, dropping to 5 µW in shutdown.
Typical applications for the MAX120CWG include industrial process-control data-acquisition boards, pen-tracer digitizers, precision instrumentation front ends, vibration and sonar signal capture, and DSP-based motor-control current sampling. The integrated reference and small wide-SOIC footprint make it well-suited for compact mixed-signal PCBs where board real estate is constrained. Its wide ±15 V input tolerance and input transient protection also support direct connection to op-amp current-shunt outputs and bridge sensors without external clamps.
When designing with this ADC, ensure that the analog and digital grounds are tied only at one point and that the 24-pin wide SOIC (W) package has sufficient copper area for thermal dissipation. Decouple AVDD and DVDD with 22 µF || 0.1 µF tantalum/ceramic pairs as recommended in the datasheet, and strap the input-range and shutdown pins according to the desired ±5 V, ±3 V, 0-5 V, or shutdown mode at power-up.
This page synthesizes distributor pricing, drop-in compatible MAX120/MAX122 family variants, and practical PCB decoupling/layout notes not always presented together in the manufacturer datasheet.
Drop-in-Alternativen für MAX120CWG – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
MAX120CWG+
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
MAX120CWG+T
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
MAX120EWG+
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
MAX122EWG+
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
MAX120C/D
✅ Drop-In ⚠️ Spezifikationen ungeprüft📋 Referenzalternative (nicht im Katalog)
MAX120CWG-T
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
MAX120CWG Grenzwerte & elektrische Eigenschaften
| Auflösung | 12 bit |
| Abtastrate | 500 ksps |
| Number of Input Channels | 1 |
| Conversion Architecture | SAR (Successive Approximation) |
| Input Range | ±5 V, ±3 V, or 0 to +5 V (strap-selectable) |
| Integral Nonlinearity (INL) | ±0.5 LSB (max, A grade) |
| Internal Reference Voltage | 2.5 V |
| Reference Drift | 40 ppm/°C (typ) |
| Aperture Delay | 100 ps (typ) |
| SINAD | 73 dB |
| THD | -70 dB |
| Supply Voltage (Analog) | ±5 V dual or +5 V single |
| Supply Voltage (Digital) | +5 V |
| Power Consumption (Active) | 90 mW (typ) |
| Power Consumption (Shutdown) | 5 µW (typ) |
| Betriebstemperatur | 0°C to +70°C (commercial) |
| Gehäuse | 24-pin wide SOIC (W) |
| Montageart | Surface Mount |
MAX120CWG Pin-Konfiguration
| Pin 1 | D0 — Data Bit 0 (LSB) output |
| Pin 2 | D1 — Data Bit 1 output |
| Pin 3 | D2 — Data Bit 2 output |
| Pin 4 | D3 — Data Bit 3 output |
| Pin 5 | D4 — Data Bit 4 output |
| Pin 6 | D5 — Data Bit 5 output |
| Pin 7 | D6 — Data Bit 6 output |
| Pin 8 | D7 — Data Bit 7 output |
| Pin 9 | D8 — Data Bit 8 output |
| Pin 10 | D9 — Data Bit 9 output |
| Pin 11 | D10 — Data Bit 10 output |
| Pin 12 | D11 — Data Bit 11 (MSB) output |
| Pin 13 | MODE — Mode strap input (read/convert/standby) |
| Pin 14 | CS — Chip select input (active low) |
| Pin 15 | RD — Read input (active low) |
| Pin 16 | CLK — External clock input |
| Pin 17 | INT/EXT — Internal/external reference select |
| Pin 18 | REF — Reference voltage I/O (2.5 V internal) |
| Pin 19 | AIN — Analog input |
| Pin 20 | AGND — Analog ground |
| Pin 21 | AVDD — Analog +5 V supply |
| Pin 22 | AVSS — Analog -5 V supply (or AGND for unipolar) |
| Pin 23 | DVDD — Digital +5 V supply |
| Pin 24 | DGND — Digital ground |
Typische Anwendungen
MAX120CWG ist geeignet für 7 Anwendungs: Industrial Process-Control Data Acquisition, Precision Instrumentation Front End, DSP-Based Motor Control Current Sampling, Vibration and Sonar Signal Capture, Pen Tracer / Waveform Digitizer, Multiplexed Data Acquisition Front End, Medical Patient Monitoring Signal Chain.
Industrial Process-Control Data Acquisition
The MAX120CWG's 500 ksps throughput and 12-bit resolution with ±0.5 LSB INL make it a strong fit for industrial process-control data-acquisition boards sampling 4-20 mA loops, RTD outputs, and thermocouple-amplifier signals. Its ±5 V bipolar input range maps directly to ±10 V process signals after a single op-amp attenuator, and the integrated 2.5 V reference removes the need for an external reference IC. With 73 dB SINAD at full speed the part delivers enough dynamic range for closed-loop control update rates of 10-100 kHz. Place the device between the analog front-end conditioning op-amps and the host MCU's SPI/DMA controller; unlike delta-sigma ADCs it adds no digital decimation latency, so the SAR's deterministic 2 µs conversion time simplifies deterministic loop timing.
Empfohlen
Precision Instrumentation Front End
Test and measurement instrumentation digitizers benefit from the MAX120CWG's 12-bit linearity, 73 dB SINAD, and on-chip track/hold with 100 ps aperture delay, which together support accurate capture of pulsed and multi-tone signals up to the Nyquist band of 250 kHz. The ±5 V bipolar input accepts the output of most instrumentation amplifiers (e.g. INA128-class) directly. The wide ±15 V input tolerance also permits direct connection to bridge-sensor and piezoelectric preamp outputs without external clamps, reducing BOM count. Combined with a low-jitter clock source, the part achieves effective-number-of-bits (ENOB) above 11 bits at low-frequency input, sufficient for audio-bandwidth and vibration analysis instruments.
Empfohlen
DSP-Based Motor Control Current Sampling
DSP-driven FOC motor controllers require deterministic, low-latency current sampling on shunt resistors, and the MAX120CWG delivers exactly that: 12-bit SAR conversion completes in 2 µs, with no decimation delay and a single-cycle track/hold acquisition. Its ±5 V input range maps directly to ±5 V op-amp current-shunt outputs, eliminating level-shifting stages. The 0°C to +70°C commercial grade is suitable for indoor motor-drive enclosures, while the MAX120EWG+ extended-grade variant is the drop-in upgrade for harsh-environment industrial drives. Synchronization to the PWM cycle is straightforward by clocking the SAR conversion with the PWM's center-aligned trigger.
Empfohlen
Vibration and Sonar Signal Capture
Wideband vibration and sonar analysis demands sample rates well above the highest signal of interest, and the MAX120CWG's 500 ksps throughput captures signals up to 250 kHz with 12-bit resolution - more than adequate for sonar preamp outputs and accelerometer-conditioned signals in the audio-to-ultrasonic band. The integrated track/hold with 100 ps aperture delay keeps aperture error negligible even at the maximum slew rate of fast sonar pulses. The internal 2.5 V reference with 40 ppm/°C drift provides channel-to-channel gain stability across multi-board sonar arrays without external references, and the 24-pin SOIC footprint drops onto standard 0.3-inch-wide PCB outlines.
Empfohlen
Pen Tracer / Waveform Digitizer
Legacy pen-tracer recorders, X-Y plotters, and waveform digitizers often need a fast, accurate bipolar-input ADC that can digitize ±5 V signals without external level shifting, and the MAX120CWG's strap-selectable ±5 V input range fits that requirement directly. The 12-bit resolution provides 4.88 mV per LSB across a 20 V output volume, sufficient to digitize the output of most legacy analog front-ends with <0.1% amplitude error. Its 90 mW active power and 5 µW shutdown make it suitable for battery-backed digitizing instruments, and the 24-pin wide SOIC is still acceptably small for retrofit boards designed around the original SO-24 outline.
Empfohlen
Multiplexed Data Acquisition Front End
Multiplexed data-acquisition systems (DAS) cycle an analog MUX through many channels and need an ADC whose per-channel acquisition-plus-conversion time matches the multiplexer settling time - the MAX120CWG's 2 µs total cycle plus integrated T/H makes it a natural fit. Its 73 dB SINAD and 70 dB THD support 12-bit ENOB at audio frequencies, sufficient for general-purpose instrumentation and SCADA I/O modules. The on-chip 2.5 V reference is shared across all MUX channels, eliminating per-channel reference drift, and the 24-SOIC footprint plus standard SPI/parallel interface simplifies routing on multi-layer PCBs.
Empfohlen
Medical Patient Monitoring Signal Chain
Patient-monitoring front-ends for ECG, SpO2, and respiration require a low-noise bipolar-input ADC with deterministic latency, and the MAX120CWG delivers this through its ±5 V input range, 73 dB SINAD, and single-cycle SAR conversion. Its 100 ps aperture delay preserves phase accuracy across multi-channel ECG leads, and the integrated 2.5 V reference with 40 ppm/°C drift minimizes gain drift across the patient monitor's thermal envelope. The 24-pin wide SOIC footprint is large enough to support post-assembly cleaning required for medical-grade PCBs, and the shutdown mode reduces power to 5 µW for battery-backed wearable patches.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für MAX120CWG – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | MAX120CWG+ | MAX120CWG+T | MAX120EWG+ | MAX122EWG+ |
|---|---|---|---|---|---|
| Package | 24-SOIC (W) | 24-SOIC (W) - same | 24-SOIC (W) - same | 24-SOIC (W) - same | 24-SOIC (W) - same |
| Brand | Analog Devices (Maxim Integrated) | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Resolution | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit |
| Sampling Rate | 500 ksps | 500 ksps | 500 ksps | 500 ksps | 500 ksps |
| Input Range | ±5 V / ±3 V / 0-5 V | ±5 V / ±3 V / 0-5 V | ±5 V / ±3 V / 0-5 V | ±5 V / ±3 V / 0-5 V | ±3 V (primary) |
| Operating Temperature | 0°C to +70°C | 0°C to +70°C | 0°C to +70°C | -40°C to +85°C | -40°C to +85°C |
| Internal Reference | 2.5 V, 40 ppm/°C | 2.5 V, 40 ppm/°C | 2.5 V, 40 ppm/°C | 2.5 V, 40 ppm/°C | 2.5 V, 40 ppm/°C |
| Power (Active) | 90 mW | 90 mW | 90 mW | 90 mW | 90 mW |
Wichtigste Unterscheidungsmerkmale
- Integrated track/hold with 100 ps aperture delay (vs. MAX120CWG+T (no extra features))
- On-chip 2.5 V reference with 40 ppm/°C drift (vs. MAX120EWG+ (industrial temp grade))
- Strap-selectable ±5 V / ±3 V / 0-5 V input range (vs. MAX122EWG+ (±3 V primary only))
- BiCMOS process combines bipolar linearity with CMOS logic (vs. MAX120C/D (bare die))
Designhinweise
Decouple AVDD with a 22 µF tantalum in parallel with a 0.1 µF ceramic placed within 5 mm of pin 21, and decouple AVSS (if used for ±5 V bipolar mode) the same way. DVDD requires a 1 µF ceramic plus 0.1 µF high-frequency bypass. Tie AGND and DGND together at a single point under the IC star-ground pattern; do not run separate ground planes back to the regulator. Using separate LDO regulators for AVDD and DVDD prevents digital switching noise from coupling into the analog reference, which would degrade SINAD by 5-10 dB.
Do not leave the MODE, INT/EXT, and input-range strap pins floating - they must be tied to VDD or DGND with 100 kΩ or directly driven. Strap-pin voltage thresholds are 0.8 V (low) and 2.4 V (high) relative to DGND. Leaving them floating results in intermittent ±5 V / ±3 V / 0-5 V mode selection and erratic conversions. Also ensure the external clock applied to CLK is a clean 0-500 kHz CMOS-level signal with < 50 ps jitter, otherwise aperture delay timing drift will show up as conversion-to-conversion noise above the rated INL floor.
Route analog input traces (AIN) as a guarded pair over a continuous ground pour, and keep digital data lines (D0-D11) away from the AIN trace to avoid digital-to-analog coupling. Use a 4-layer PCB with a dedicated ground plane between the analog signal layer and the digital bus layer. Place the 22 µF bypass within 5 mm of AVDD; do not place it more than 10 mm away or high-frequency supply noise couples into the track/hold aperture. The exposed thermal pad is not present on the 24-SOIC package, so thermal dissipation is limited to PCB copper - typical theta_JA is 85°C/W in still air.
The MAX120CWG's input is a switched-capacitor track/hold that draws transient charge during acquisition; add a low-impedance op-amp buffer (e.g., MAX4250) within 25 mm of AIN if the source impedance exceeds 1 kΩ. For very high source impedances (>10 kΩ), add an additional 100 pF to 1 nF capacitor at AIN to filter RF pickup - this does not affect acquisition time at the rated 500 ksps rate.
Compliance-Informationen
RoHS/REACH status was not provided in the verified web data; the '+' suffix on MAX120CWG+ indicates RoHS compliance per Maxim convention. AEC-Q100 not applicable for commercial 0-70°C grade. Refer to manufacturer datasheet for full compliance certificates.
