ADC/DAC
Productos (2518)
LTC2389HLX-18 - 18-Bit 2.5Msps SAR ADC 99.8dB SNR | Analog Devices
The Analog Devices LTC2389HLX-18 is a low-noise, high-speed 18-bit successive approximation register (SAR) analog-to-digital converter sampling at up to 2.5 Msps, packaged in a 48-lead LQFP (7x7 mm). It achieves 99.8 dB SNR and integrates a precision internal 4.096 V reference with ±20 ppm/°C maximum temperature coefficient, plus an internal reference buffer for single-5V-supply operation. A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a precision data converter that uses a binary-search algorithm and an internal capacitive DAC to resolve an analog input into a digital code. SAR ADCs combine high resolution with low latency and zero pipeline delay, occupying the tier between flash converters (fastest, lowest resolution) and sigma-delta ADCs (highest resolution, slowest). They are the workhorse of precision industrial instrumentation, medical imaging, and high-speed control loops. Key features include pin-configurable analog input ranges — fully differential ±4.096 V, pseudo-differential unipolar 0 V to 4.096 V, and pseudo-differential bipolar ±2.048 V — allowing direct interface to multiple signal-chain formats without external level shifting. The device delivers 18-bit no-missing-codes performance, a wide common-mode range, and on-chip reference buffer that simplifies the analog front-end. Internally, the LTC2389-18 uses a charge-redistribution capacitive DAC with a precision thin-film resistor network for laser-trimmed linearity, and an internal oscillator that eliminates the need for an external clock. The internal reference and reference buffer together minimize external component count while preserving 99.8 dB SNR across the full operating temperature range. Typical applications include high-speed precision data acquisition systems, medical imaging front-ends, vibration and acoustic analysis, spectrum and FFT analysis, and process control loops. The wide input range makes it suitable for direct connection to bridge sensors, audio CODEC front-ends, and industrial 4–20 mA loop receivers after appropriate signal conditioning. When designing with this device, keep analog and digital grounds separated and joined at a single star point under the IC. Place the 10 µF input decoupling capacitor and reference bypass capacitor as close as possible to the supply and REFIN pins to achieve the rated 99.8 dB SNR. Allow sufficient quiet settling time between conversions when operating near full throughput. This page synthesizes distributor stock, cross-reference alternatives, and design notes not found in the bare datasheet, providing an engineer-ready summary tailored for high-precision SAR ADC selection and PCB bring-up.
LTC2389ILX-16 - 16-Bit 2.5Msps SAR ADC | Analog Devices
The Analog Devices LTC2389ILX-16 is a 16-bit, 2.5 Msps successive approximation register (SAR) analog-to-digital converter housed in a 48-pin LQFP (7x7 mm) package. Operating from a single 5V supply, the device supports pin-configurable input ranges including fully differential (±4.096 V), pseudo-differential unipolar (0 V to 4.096 V), and pseudo-differential bipolar (±2.048 V) modes, giving system designers flexibility for direct connection to a wide range of sensors and signal-conditioning front ends. A SAR ADC is a type of data converter that uses a binary-search successive-approximation algorithm against an internal precision DAC to digitize an analog input in N clock cycles for N-bit resolution. SAR ADCs occupy a position in the broader converter hierarchy between flash converters (fastest, lowest resolution) and sigma-delta converters (highest resolution, slower), offering an attractive balance of speed, resolution, and latency for multiplexed data-acquisition and industrial-instrumentation systems. The LTC2389 family specifically targets low-noise, high-speed, multiplexed applications where a single ADC serves many channels through an external MUX. Key features include guaranteed 16-bit no-missing-codes performance, low noise of 0.6 LSB RMS (transition noise) thanks to on-chip oversampling capability, an internal 4.096 V reference with 0.5% initial accuracy and ±20 ppm/°C maximum temperature coefficient, and a digital gain compression (DGC) mode that eliminates the need for a negative supply on the analog input. The wide-input-common-mode range simplifies front-end signal conditioning, and the LVDS-compatible serial interface supports high-speed board-to-board data transfer. The architecture combines a charge-redistribution capacitive DAC with an internal reference buffer, providing a fast settling acquisition path and transparent latency of one conversion cycle. On-chip digital filtering and an internal oscillator reduce external component count, while the SPI-compatible serial LVDS I/O simplifies FPGA/ASIC interfacing. The 48-LQFP package is footprint-compatible across the LTC2389-16, LTC2389-18, and related family members. Typical applications include industrial process control, multiplexed data acquisition systems, medical imaging front ends, instrumentation and test equipment, and high-speed ATE systems. The combination of low noise, wide input range, and high throughput makes the part especially well suited to photodiode, transducer, and bridge-sensor signal chains. When designing with this device, pay close attention to PCB layout: the analog input traces must be differential and length-matched, the reference decoupling must use a low-ESR 10 µF ceramic directly at the REFCAPA/REFCAPB pins, and a clean analog ground island should be maintained around the ADC. When the input is configured in pseudo-differential mode, drive the common-mode pin (COM) with a low-impedance source to preserve linearity. This page synthesizes distributor pricing, drop-in alternatives, application notes, and design considerations that are not aggregated on any single manufacturer or distributor product page.
LTC2389IUK-16 - 16-Bit 2.5Msps SAR ADC | Analog Devices
The Analog Devices LTC2389IUK-16 is a low-noise, high-speed 16-bit successive approximation register (SAR) analog-to-digital converter that samples at up to 2.5 Msps and is housed in a 48-pin QFN (7x7 mm) package. The Industrial-grade IUK-16 variant operates from a single 5V supply, supports pin-configurable inputs including fully differential (±4.096 V), pseudo-differential unipolar (0V to 4.096V), and pseudo-differential bipolar (±4.096V) ranges, and achieves 16-bit resolution with no missing codes at the full throughput. A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a sampled-data converter architecture that performs one binary search per clock cycle using an internal DAC and comparator. SAR ADCs are favored for instrumentation, motor control, and data acquisition because they combine deterministic latency (one conversion = N clock cycles, where N is the bit count), excellent DC accuracy, low latency, and low power consumption versus pipelined or delta-sigma converters. The LTC2389-16 belongs to the precision SAR converter category of mixed-signal data-acquisition ICs. Key features include ±0.5 LSB (max) INL and ±0.5 LSB (max) DNL, a wideband internal reference (4.096V ±0.5% initial accuracy with ±20 ppm/°C maximum temperature coefficient), an internal reference buffer, and a high-speed SPI-/QSPI-/MICROWIRE-compatible serial interface with a configurable 16-/8-bit bus width. The device accepts a low-drift external overdrive on the reference pin for ratiometric measurements, while a digital gain compression function provides ±4.096 V true bipolar input range from a single 5V supply. The architecture employs a charge-redistribution switched-capacitor DAC core fed from a precision bandgap reference buffer, with on-chip calibration of linearity errors and a proprietary switching scheme that minimizes harmonic distortion. The wide common-mode input range and 92 dB common-mode rejection at 100 kHz simplify front-end signal conditioning, while the low aperture delay and deterministic latency support multiplexed multi-channel sampling. Typical applications include industrial process control and data acquisition, instrumentation and motor control loops, digital instrumentation position sensors, ATE (Automatic Test Equipment) boards, optical networking control loops, and precision weigh scales. The 2.5 Msps throughput, low latency, and 16-bit no-missing-codes performance make it well suited to closed-loop control applications where latency, accuracy, and code integrity dominate. Designers should place the 1 µF reference bypass capacitor and 10 µF input RC network as close to the analog inputs as possible to preserve linearity at full throughput; inadequate decoupling or reference bypassing will degrade SNR. The 48-pin QFN exposed pad must be soldered to a continuous ground plane for thermal dissipation and electrical reference. This page consolidates distributor stock and pricing snapshots, a same-brand drop-in alternatives list, package-aware comparison tables, and practical decoupling/grounding design notes that supplement the manufacturer datasheet.
LTC2389IUK-18 - 18-Bit 2.5Msps SAR ADC | Analog Devices
The Analog Devices LTC2389IUK-18 is a low noise, high speed 18-bit successive approximation register (SAR) analog-to-digital converter (ADC) sampling at 2.5 Msps and housed in a 48-lead QFN (7x7 mm) package. Operating from a single 5 V supply, the device supports pin-configurable fully differential (±4.096 V), pseudo-differential unipolar (0 V to 4.096 V) and pseudo-differential bipolar (±2.048 V) analog input ranges, allowing one ADC to interface with multiple signal-chain formats without hardware changes. A SAR ADC is a successive-approximation-register analog-to-digital converter that performs a binary search across an internal capacitive DAC to resolve each conversion in N clock cycles. SAR ADCs sit in the data-converter hierarchy between flash and delta-sigma converters, combining low latency (no digital filter pipeline delay), high DC accuracy, and reasonable sampling rates, which makes them the topology of choice for multiplexed data acquisition, control loops, and instrumentation front ends. Key features include 99.8 dB SNR, ±2 LSB INL (max), no missing codes at 18 bits, an internal precision 4.096 V reference with ±20 ppm/°C max drift, an internal reference buffer, and a serial LVDS digital interface. The pin-configurable analog input range and integrated reference buffer minimize external component count, while the 5 V single-supply operation simplifies analog front-end and digital host power trees. The 7x7 mm QFN-48 package provides low thermal resistance and a small PCB footprint for dense multi-channel systems. The architecture uses a charge-redistribution CDAC sampling front end that achieves 99.8 dB SNR and 20-bit RMS noise performance through careful analog design, low-jitter clocking, and a dedicated reference buffer. The -I temperature grade (industrial) operates from -40 °C to +85 °C, and the internal reference voltage is decoupled internally; the datasheet recommends external bypass capacitors for full noise performance. Typical applications include high-speed multiplexed data acquisition, instrumentation, medical imaging, vibration analysis, industrial process control, and ATE (automatic test equipment) signal capture. The wide input-range configurability suits multi-format sensor interfaces and precision measurement front ends. When designing with the LTC2389IUK-18, place the internal reference bypass capacitor as close to the REFCAP pin as possible, keep analog and digital grounds separated, and use a low-jitter LVDS clock source to avoid degrading SNR. Because the SAR architecture is sensitive to input-bandwidth and settling-time limits, pay close attention to driving amplifier selection and RC anti-alias filter design. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes for the LTC2389IUK-18 not found in a single manufacturer document, helping engineers select and qualify the part quickly.
LTC2391CLX-16 - 16-Bit 250ksps SAR ADC, 94dB SNR | Linear Technology
The Analog Devices LTC2391CLX-16 is a 16-bit, 250 ksps successive-approximation-register (SAR) analog-to-digital converter with 94 dB SNR, packaged in a 48-pin LQFP (7x7 mm). It integrates a precision internal reference (0.5% initial accuracy, +/-20 ppm/degree C max temperature coefficient) and accepts a true bipolar +/-VREF differential input range, simplifying system signal-chain design by removing external reference circuitry. Operating from a single 5 V supply, the device delivers full throughput with no cycle latency in both parallel and serial interface modes. What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a precision data-conversion topology that performs a binary search against an internal DAC to digitize an analog input one bit at a time, typically completing a conversion in N clock cycles for an N-bit device. Within the broader signal-chain taxonomy, a SAR ADC sits under ADC (analog-to-digital converter) -> data converter -> mixed-signal IC -> semiconductor IC. SAR converters are favored over delta-sigma for multiplexed or multi-channel data acquisition where low latency and deterministic per-sample throughput matter more than absolute resolution beyond 18-20 bits. Key features of the LTC2391CLX-16 include 94 dB SNR at the 250 ksps maximum sampling rate, an integrated 2.5 ppm/degree C (max) reference with 0.5% initial accuracy, true bipolar differential inputs spanning 4 * VREF, hardware-selectable parallel or serial (SPI-/QSPI-/MICROWIRE-compatible) interface, and dedicated nap and sleep power-down modes. The differential architecture inherently rejects common-mode noise and switching-rail interference from upstream analog front ends. Architecture-wise, the LTC2391CLX-16 uses a charge-redistribution capacitive DAC core combined with an on-chip low-drift bandgap reference, sampled by a high-bandwidth input stage. The combination achieves 94 dB SNR while dissipating only 95 mW at full 250 ksps throughput, dropping below 12 mW in nap mode and below 1 microamp in sleep mode for battery-powered or duty-cycled instrumentation. Typical applications include industrial process control and high-speed data acquisition, medical instrumentation front ends, seismic and vibration monitoring, ATE (automatic test equipment) digitizers, and precision multi-channel multiplexed systems where its zero-cycle-latency architecture eliminates the group delay of pipeline or delta-sigma converters. When designing with the LTC2391CLX-16, place the analog and digital ground planes as a single solid pour under the device, decouple OVDD and AVDD with separate 10 microfarad + 0.1 microfarad ceramic pairs within 5 mm of the pins, and use a 100 ohm series resistor on each digital output to damp ringing on the parallel bus. Avoid routing the conversion clock near the analog inputs to preserve the 94 dB SNR floor. This page synthesizes distributor pricing, drop-in pin-compatible alternatives, application guidance, and design notes not found in the manufacturer datasheet.
LTC2391HLX-16 - 16-Bit 250ksps SAR ADC | Analog Devices
The Analog Devices LTC2391HLX-16 is a low-noise, high-speed 16-bit successive approximation register (SAR) analog-to-digital converter sampling at 250 ksps, housed in a 48-pin LQFP (7x7 mm) package. It operates from a single 5 V supply and supports a large fully differential input range of ±4.096 V, achieving 94 dB SNR. The -16 suffix denotes the 16-bit resolution; -HLX denotes the LQFP-48 package with the automotive H-grade temperature range. A SAR ADC is a type of analog-to-digital converter that performs a binary search through an internal capacitive DAC to determine the digital output code one bit at a time per conversion clock. SAR ADCs combine low latency, deterministic throughput, and excellent noise performance, making them the preferred topology for multiplexed data acquisition, motor control feedback loops, and precision instrumentation. Within the broader taxonomy, the LTC2391HLX-16 belongs to the precision ADC -> data converter -> signal chain IC family of mixed-signal semiconductors. Key features include 16-bit no-missing-codes performance, 94 dB SNR, ±4.096 V true-differential inputs, integrated reference and reference buffer, and selectable parallel or serial (SPI-compatible) interface. The internal 4.096 V reference is trimmed for low drift, eliminating external reference components in many designs. The wide common-mode input range and high common-mode rejection allow direct connection to bridge sensors, current shunts, and high-impedance signal sources without active front-end conditioning. Architecturally, the LTC2391HLX-16 uses a charge-redistribution capacitive DAC and on-chip calibration to achieve INL of ±1 LSB and excellent DC accuracy. Its single-shot and burst conversion modes allow trade-offs between latency and channel density. Compared with delta-sigma ADCs of similar noise, it offers dramatically lower latency (one conversion period versus many oversampling cycles), which simplifies system timing in closed-loop control. Typical applications include industrial process control, weigh scales, instrumentation, motor control current sensing, multiplexed data acquisition systems, and precision sensor signal chains. The differential ±4.096 V range maps cleanly to ±10 V reduced inputs and 4 mA-to-20 mA loop-powered sensor outputs. When designing with this part, observe the analog and digital ground separation recommended in the datasheet typical application, keep analog input traces short and symmetric, and bypass both AVDD and DVDD with 10 µF ceramic plus 0.1 µF decoupling placed as close as possible to the supply pins. This page synthesizes distributor pricing, drop-in pin-compatible alternatives from the same Linear Technology/Analog Devices 2391 family, and practical design notes that complement, but do not replace, the manufacturer's datasheet.
LTC2391ILX-16 - 16-Bit 250ksps SAR ADC, 48-LQFP | Analog Devices
The Analog Devices LTC2391ILX-16 is a 16-bit, 250 ksps successive-approximation-register (SAR) analog-to-digital converter (ADC) with 94 dB SNR, housed in a 48-pin LQFP (7x7 mm) package. The part integrates a precision internal reference rated 0.5% initial accuracy with ±20 ppm/°C maximum temperature coefficient, removing the need for an external reference in most precision signal-chain designs. It supports both parallel and serial host interfaces with no cycle latency between conversions. A SAR ADC is a class of Nyquist-rate data converter that uses a binary-search algorithm against a precision DAC to resolve the input voltage in N clock cycles for an N-bit output. SAR ADCs are valued for their deterministic latency, low power, and excellent DC accuracy — they belong to the data-converter hypernym hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. Key features of the LTC2391ILX-16 include 94 dB SNR, ±2 LSB INL (typical), true-differential inputs with wide common-mode range, an internal oscillator, and a hardware-mode configuration that allows standalone operation. The device accepts a single 5 V analog rail and provides a low digital supply current, making it well-suited to dense multi-channel instrumentation boards. Architecturally, the LTC2391 uses a charge-redistribution capacitive DAC array with a high-precision thin-film resistor reference network, achieving 16-bit resolution without calibration. The internal reference buffer isolates the reference from switching transients, contributing to the wide 94 dB SNR and clean THD performance across audio-band signal frequencies. Typical applications include industrial process-control data acquisition modules, weigh scales, precision instrumentation, portable medical diagnostics, and seismic-data front-end digitizer card. With 250 ksps throughput and no pipeline latency, the part is also appropriate for closed-loop control loops where conversion determinism matters. When designing with this part, ensure the analog input network respects the 5 V common-mode range and that the reference decoupling capacitor is placed within 5 mm of the REF pin. For multi-board synchronization, drive the CNTR pin from a low-jitter source, and decouple AVDD/DVDD/OVDD rails separately to prevent digital switching noise from coupling into the SAR comparator. This page synthesizes distributor pricing, drop-in same-package alternatives (LTC2391CLX-16 from the same datasheet family), and practical PCB-level design notes not assembled in the manufacturer datasheet alone.
LTC2391IUK-16 - 16-Bit 250ksps SAR ADC, ±4.096V Input | Analog Devices
The Analog Devices LTC2391IUK-16 is a low-noise, high-speed 16-bit successive approximation register (SAR) analog-to-digital converter that operates from a single 5V supply and samples at 250 ksps. Packaged in a 48-lead QFN (7x7 mm), the part features a true bipolar ±4.096V fully differential input range, ±2 LSB INL max, no missing codes at 16 bits, and 94 dB SNR (typical). The -IUK variant carries the industrial (-40C to +85C) operating temperature grade. A SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary-search algorithm with a high-precision comparator and a switched-capacitor DAC to resolve one bit per clock cycle. SAR ADCs occupy a middle tier in the converter hierarchy above flash ADCs (lower latency, lower power) and below delta-sigma ADCs (higher dynamic range, slower). They are widely deployed in industrial process control, instrumentation, and precision data-acquisition front-ends where deterministic latency and wide input common-mode ranges are required. Key features of the LTC2391IUK-16 include an integrated precision reference (0.20% initial accuracy and 20 ppm/C max temperature coefficient), a flexible SPI-compatible serial interface, single-cycle conversion with no latency, and a wide analog input common-mode range that simplifies front-end signal conditioning. The differential input stage provides excellent common-mode rejection for noisy industrial settings. The 48-QFN package's exposed pad provides a low thermal-resistance (~28 C/W) path that supports reliable operation at full 250 ksps throughput. The device operates from a single 5V analog supply (VDD) and a 5V digital supply (OVDD), with the OVDD level setting the logic output compliance. The internal 4.096V reference is trimmed for low drift, eliminating the need for an external reference in most designs. The architecture uses a charge-redistribution DAC and on-chip calibration registers to achieve the datasheet INL and DNL specifications without user-side calibration. Typical applications include precision industrial process control, seismic and instrumentation front-ends, ATE (Automatic Test Equipment) digitizers, and high-accuracy weigh scales. The wide ±4.096V differential input range allows direct digitization of bridge sensors, thermocouple-amplifier outputs, and ±10V signals after a simple resistive divider. When designing with this part, place the 10uF bypass capacitors as close as possible to the REFCAP, AVDD, and OVDD pins and connect the exposed pad to a solid analog ground plane. Maintain a clean differential trace layout for IN+ and IN-; imbalance directly degrades the 94 dB SNR. For best linearity, follow Analog Devices' recommended footprint and use guard rings around sensitive analog nodes.
LTC2392CUK-16 - 16-Bit 500ksps SAR ADC | Analog Devices
The Analog Devices LTC2392CUK-16 is a low noise, high speed 16-bit successive approximation register (SAR) analog-to-digital converter with 500 ksps throughput and 94 dB SNR, offered in a 48-pin QFN (UK-16) package. Operating from a single 5 V supply, the device accepts a large ±4.096 V fully differential input range, making it suitable for high-performance applications requiring maximum dynamic range. The device is specified over the commercial 0 °C to 70 °C temperature range, indicated by the CUK suffix. A successive approximation register (SAR) ADC is a sampling converter that uses a binary-search algorithm against an internal capacitive DAC to produce a digital output in N conversion cycles for N-bit resolution. SAR ADCs combine low latency, deterministic behavior, and typically excellent DC accuracy with moderate-to-high sampling rates, sitting in the signal chain between conditioning front-ends and digital processors. The LTC2392-16 family sits above general-purpose 12-/14-bit SAR parts and competes with pipeline ADCs at moderate speeds, where its single-supply simplicity and lack of pipeline latency give it an edge in multiplexed and multiplexed-channel instrumentation. Key features include a precision internal reference with 0.5 % initial accuracy and a guaranteed ±20 ppm/°C maximum temperature coefficient, an internal clock, and selectable parallel or serial digital interface. Both interface options are available without cycle latency, enabling readback in the same conversion cycle, which simplifies FPGA and microcontroller interfacing. The architecture combines a charge-redistribution 16-bit DAC, a high-speed low-noise comparator, and an internal 4.096 V reference. The differential input structure and integrated reference deliver the 94 dB SNR typical of high-performance SAR converters without requiring an external low-noise reference, simplifying board design and reducing BOM cost. Typical applications include industrial process control and data acquisition, multi-channel instrumentation, motor control feedback, and precision sensor signal chains where ±10 V or 4-20 mA inputs must be digitized at moderate rates. The wide ±4.096 V differential input range also suits medical instrumentation and weigh scales. The combination of 16-bit no-latency conversion and 500 ksps speed makes the device well suited to multiplexed multi-channel systems. When designing with this part, place the bypass and reference capacitors as close as possible to the supply and REFCAP pins to preserve AC performance. Both CNV and clock traces should be routed away from analog input traces to minimize digital coupling into the conversion result. This page synthesizes distributor pricing, drop-in alternatives, and applied design guidance not bundled in the manufacturer datasheet, with all data points cited against their source.
LTC2392ILX-16 - 16-Bit 500ksps SAR ADC, 94dB SNR | Analog Devices
The Analog Devices LTC2392ILX-16 is a 16-bit, 500ksps successive approximation register (SAR) analog-to-digital converter with 94dB SNR, supplied in a 48-lead LQFP (7x7 mm) package. It operates from a single 5V supply and supports a true bipolar ±4.096V fully differential input range, delivering a maximum dynamic range of more than 19 effective bits at the full 500k samples per second throughput. An internal precision reference is included with a guaranteed 0.5% initial accuracy and a maximum temperature coefficient of ±20 ppm/°C, eliminating the need for an external reference component in most designs. A SAR (Successive Approximation Register) ADC converts a single analog sample to a digital code using a binary-search algorithm against an internal DAC, trading flash speed for high resolution with low power and zero pipeline latency. The LTC2392-16 sits in the precision data-acquisition tier of Analog Devices' ADC portfolio — between general-purpose successive-approximation parts and the higher-speed pipelined converters — and is widely deployed where accurate capture of slowly changing or wide-bandwidth signals is required without sacrificing throughput. Key feature highlights include simultaneous SPI-compatible serial and parallel data interfaces with no cycle latency, hardware-selectable nap and sleep power-down modes that reduce quiescent current to nanoampere levels between conversions, and fast full-scale settling that allows the device to react promptly to large input steps after power-down. The combination of ±4.096V true-differential inputs, internal reference, and 110 mW typical dissipation at 500ksps makes the part well suited to industrial process-control and instrumentation front-ends. The 48-pin LQFP-48 (7x7 mm) footprint is compatible with the LTC2392 family, and a commercial-grade variant (LTC2392CLX-16) covers the 0 °C to +70 °C window for cost-sensitive applications. Typical applications include high-speed industrial process monitoring, precision weigh scales, instrumentation and data acquisition boards, and motor control feedback loops. The wide bipolar input range and fast settling also suit the part for use in multiplexed channel scanning and medical instrumentation front-ends. When designing in the LTC2392ILX-16, pay attention to input common-mode and reference-decoupling layout; place 10 µF bypass capacitors as close as possible to the REFP, REFN, and VDD pins to realize the rated 94 dB SNR.
LTC2393CUK-16 - 16-Bit 1Msps SAR ADC 94dB SNR | Analog Devices
The Analog Devices LTC2393CUK-16 is a 16-bit, 1Msps successive-approximation-register (SAR) analog-to-digital converter (ADC) with 94dB SNR, housed in a 48-pin QFN (7x7) UK package. It accepts a single fully-differential analog input, integrates a precision internal reference (0.5% initial accuracy, ±20ppm/°C max temperature coefficient), and supports both parallel and serial interface modes with no cycle latency. An SAR ADC is a successive-approximation-register analog-to-digital converter, a class of data converter that uses a binary-search algorithm and an internal capacitive DAC to resolve each sample in a fixed number of clock cycles. In the broader signal-chain hierarchy, SAR ADCs sit between flash converters (faster but lower resolution) and sigma-delta ADCs (higher resolution but slower) and are favored for multiplexed data acquisition, motor control, and instrumentation loops where deterministic latency, moderate resolution, and high throughput are all required. Key features of the LTC2393CUK-16 include ±5V true bipolar input range with 94dB SNR and 16-bit no-missing-codes, an internal 4.096V reference that can be overdriven by an external reference, and wide 4.5V to 5.5V analog supply operation. The device also offers a flexible digital interface (parallel or serial LVCMOS), a low-drift internal reference, and a per-channel input span of ±VREF centered on common mode. Architecturally the converter uses a charge-redistribution SAR core that resolves 16 bits in a single conversion cycle, enabling 1Msps throughput with no pipeline delay. The internal reference is a low-noise bandgap with curvature compensation, and the analog input front-end is a true fully-differential switched-capacitor sampler with integrated input transient buffers. This topology makes the part tolerant of source-impedance variation and immune to charge kickback. Typical applications include high-speed industrial data acquisition, medical imaging front-ends, motor control current sensing, multichannel multiplexed instrumentation, and automated test equipment (ATE) digitizer cards. The wide input range simplifies signal conditioning when interfacing directly to ±10V sensors with external resistor dividers. When designing with this ADC, place the analog and digital ground planes in a star pattern and decouple the analog supply with a 10uF ceramic plus a 0.1uF capacitor placed within 5mm of the AVdd pin. Source-impedance above 50 ohms will degrade THD, so add a wideband buffer such as the LT6203 directly in front of the inputs. This page synthesizes distributor pricing, same-family alternatives, and practical design notes that go beyond the manufacturer datasheet to accelerate your LTC2393CUK-16 selection and bring-up.
LTC2393HLX-16 - 16-Bit 1Msps SAR ADC, 94dB SNR, 48-LQFP | ADI
The Analog Devices LTC2393HLX-16 is a 16-bit, 1Msps successive approximation register (SAR) analog-to-digital converter with 94.2 dB SNR (typical), housed in a 48-pin LQFP (7x7 mm) package. It operates from a single 5V analog supply and accepts a wide ±4.096V fully differential input range, maximizing dynamic range for high-performance signal acquisition. The device achieves ±2 LSB INL maximum with no missing codes at 16 bits, guaranteeing true 16-bit conversion integrity. What is a SAR ADC? A successive approximation register ADC is a precision data converter that uses a binary search algorithm through an internal DAC to digitize an analog input. SAR ADCs occupy the middle ground between high-speed flash converters and ultra-high-resolution delta-sigma ADCs, delivering low-latency, deterministic conversion with no pipeline delay. They sit within the broader hierarchy: data converter -> ADC -> SAR ADC -> precision mixed-signal IC, and are widely preferred when both speed and DC accuracy are required simultaneously. Key features include an integrated precision reference with 0.5% initial accuracy and ±20 ppm/°C maximum temperature coefficient, eliminating the need for an external reference. The part supports both parallel and serial interface modes with no cycle latency, and provides true 16-bit no-missing-codes performance across the entire operating range. Internal low-noise architecture achieves 94.2 dB typical SNR at the full 1Msps throughput. The LTC2393HLX-16 architecture combines a charge-redistribution capacitive DAC with a high-speed comparator and SAR logic, all clocked internally for low jitter. The differential input structure rejects common-mode noise and harmonic distortion, and the wide ±4.096V input range supports direct interfacing to industrial ±10V-scaled signals after attenuation. Single 5V operation simplifies power tree design in mixed-signal systems. Typical applications include precision industrial process control, medical instrumentation, seismic data acquisition, high-speed multichannel data acquisition systems, and ATE (automatic test equipment). The wide input range and high SNR make it well suited for vibration analysis, sonar front-ends, and spectrum analyzer input stages. When designing with this device, ensure the analog input common-mode voltage is biased near AVDD/2 and that the RC charge kick-back at the input is absorbed with an external buffer such as the LT6350. Decouple AVDD and DVDD independently with low-ESR ceramic capacitors placed close to the supply pins. This page synthesizes distributor pricing, drop-in SAR ADC alternatives, and practical design notes not found in the manufacturer datasheet alone.
LTC2393ILX-16 - 16-Bit 1Msps SAR ADC 94dB SNR | Analog Devices
The Analog Devices LTC2393ILX-16 is a 16-bit, 1Msps successive-approximation-register (SAR) analog-to-digital converter with 94 dB SNR, offered in a 48-pin LQFP (7x7 mm) industrial-temperature package. It integrates a precision internal reference (0.5% initial accuracy, ±20 ppm/°C max drift), a high-performance sample-and-hold, and both parallel and serial digital interfaces, all in a single chip. The device operates from a 5V analog supply and 2.5V to 5.25V digital I/O supply. A SAR ADC (successive-approximation-register analog-to-digital converter) is a type of Nyquist-rate data converter that resolves one bit per internal clock cycle using a binary-search algorithm against a precision DAC and comparator. SAR ADCs occupy the middle ground between flash converters (very fast but power-hungry and low resolution) and sigma-delta converters (very high resolution but limited to lower input bandwidth). The LTC2393ILX-16's 1 Msps throughput with no pipeline latency makes it ideal for multiplexed data acquisition, control loops, and instrumentation where deterministic single-cycle conversion latency is required. Key features include 94 dB SNR, 90 dB THD, ±2 LSB INL typical, and a wide input common-mode range. The internal reference eliminates external reference drift and layout burden, while the dual-interface (parallel + serial) gives PCB designers flexibility. The part supports daisy-chained readout on the serial interface, simplifying multi-channel designs. Typical aperture delay is well controlled for synchronous sampling. Architecture-wise, the LTC2393 uses a charge-redistribution DAC array and an internal low-noise reference buffer, with on-chip calibration logic that corrects capacitor mismatch at power-up. The combination of 1 Msps real sampling rate and 16-bit resolution delivers SNR figures approaching sigma-delta performance without the latency penalty, making the LTC2393ILX-16 a benchmark for precision industrial and instrumentation designers. Typical applications include industrial process control and data acquisition, precision weigh scales and force-meters, motor control feedback, vibration and acoustic analysis, and medical instrumentation front ends. The wide operating temperature range and integrated reference simplify designs where PCB area and component count matter most. Design consideration: ensure the analog and digital grounds are tied at a single star point beneath the IC. Bypass the AVDD and DVDD pins with 10 µF + 100 nF vacuum decay (VDEC) capacitors placed as close as possible to the package. The internal reference eliminates the need for an external REF, but the REFCOMP pin still needs a 10 µF hold capacitor for noise filtering. This page synthesizes distributor pricing as of 2026-10-13, drop-in alternatives sourced from the ADI/Linear Technology family and competitive web references, and practical design notes not found in the standalone manufacturer datasheet.
LTC2393IUK-16 - 16-Bit 1Msps SAR ADC, 94dB SNR | Analog Devices
The Analog Devices LTC2393IUK-16 is a low-noise, high-speed 16-bit successive approximation register (SAR) analog-to-digital converter with 1Msps throughput and 94dB SNR, housed in a 48-lead QFN (7x7 mm, UK suffix) package. Operating from a single 5V analog supply, the part accepts a large fully-differential input range of plusmn 4.096V, making it well-suited to high-performance applications that demand maximum dynamic range per channel. The IUK-16 industrial-grade variant (operating from -40C to +85C) is supplied in a UK package finish compatible with the LTC2392 and LTC2391 SAR ADC families. What is a SAR ADC? A successive approximation register analog-to-digital converter is a precision data-conversion topology that performs one bit per clock cycle using a binary-search algorithm against an internal DAC. SAR ADCs sit in the taxonomy between flash converters (fastest, lowest resolution) and delta-sigma ADCs (slowest, highest resolution), occupying the sweet spot of 12-20 bits at 0.1-10 Msps with no latency and deterministic behavior - ideal for multiplexed data acquisition, motor control, and instrumentation. Key specifications include 94dB SNR at 1Msps for high dynamic-range capture, an internal precision reference with 0.5% initial accuracy and plusmn 20ppm/C (max) temperature coefficient that eliminates external reference components, plus both parallel and serial (SPI-/QSPI-/MICROWIRE-compatible) interface modes selected at power-up via the PAR/SER pin. The device draws approximately 14 mW active power at 1Msps and offers nap and sleep modes that bring quiescent consumption into the microamp range for battery-friendly operation. Architecturally, the LTC2393-16 uses a charge-redistribution DAC array with input sampling on dedicated fully-differential SWCAP front-ends, allowing common-mode rejection above 80 dB and preserving linearity across the full plusmn 4.096V differential input range. An integrated reference buffer drives the SAR core without requiring an external reference amplifier, simplifying the analog front end for both AC- and DC-coupled signal chains. Typical applications span precision industrial data acquisition, weigh scales and strain-gauge digitizers, process-control loopback I/O, high-speed medical instrumentation, vibration and seismic monitoring, and multi-channel multiplexed sensor front ends where its low latency and wide input range minimize front-end signal conditioning. When designing with the LTC2393IUK-16, ensure the analog and digital grounds meet only at the exposed pad, place 10uF + 0.1uF decoupling as close as possible to the AVDD/DVDD pins, and confirm the PAR/SER strapping option matches the host MCU/DSP/FPGA interface width before board bring-up. The optional CNVST-driven burst mode is useful when synchronizing multiple LTC2393s to a shared external clock. This page synthesizes distributor pricing, drop-in alternatives drawn from the same SAR ADC family, and practical design notes not collected in any single datasheet or catalog entry.
LTC2415IGN - 24-Bit No Latency Delta Sigma ADC | Analog Devices
The Analog Devices LTC2415IGN is a 24-bit no-latency delta-sigma analog-to-digital converter with differential input and differential reference, housed in a 16-pin SSOP package. It delivers 2 ppm INL, 0.23 ppm RMS noise, and operates from a 2.7 V to 5.5 V supply while drawing only microamp-level quiescent current. A 24-bit delta-sigma ADC is a high-resolution converter that uses noise shaping and oversampling to achieve very high effective resolution at low sample rates. Delta-sigma ADCs are widely used in precision measurement, weighing scales, industrial process control, and temperature monitoring because they integrate a digital filter, modulator, and reference input in a single IC. Within the broader hierarchy, the LTC2415 belongs to the precision ADC category, itself part of the data converter product family under Analog Devices' signal-chain portfolio. Key features include differential input common-mode voltage V(INCM) and differential reference common-mode voltage V(REFCM) that can be independently set anywhere between GND and VCC, enabling true ratiometric measurements. The single-pin mode selection offers better than 110 dB input differential-mode 50 Hz / 60 Hz noise rejection, while the integrated oscillator eliminates the need for an external clock crystal. The serial SPI / MICROWIRE-compatible interface simplifies connection to microcontrollers, FPGAs, and digital isolators. The converter achieves single-cycle settling, which makes it suitable for multiplexed applications where input channels are switched between measurements. The integrated digital filter rejects line frequency noise by more than 110 dB in the 50 Hz / 60 Hz common-mode rejection mode, a key requirement for weighing scales and process instrumentation. The 0.23 ppm RMS noise floor and 2 ppm INL specification provide true 24-bit effective resolution for DC measurements. Typical applications include precision weighing scales, industrial process control, strain-gauge transducers, thermocouple and RTD temperature measurement, and battery-cell voltage monitoring. The differential input structure makes the part well-suited to bridge-sensor signal conditioning and medical instrumentation front-ends. When designing with the LTC2415IGN, observe the 2.7 V to 5.5 V supply range and place 0.1 µF bypass capacitors near the VCC pin to minimise digital noise coupling. For best 50/60 Hz rejection, hold the FO pin high and ground the CS pin to enter 110 dB common-mode rejection mode; the digital interface timing should respect the 256 ms conversion period at the maximum output rate of approximately 15 samples per second. This page synthesises distributor pricing, drop-in pin-compatible alternatives, and practical design notes not found on the manufacturer datasheet alone, providing an actionable engineering reference for selecting and implementing the LTC2415IGN.
LTC2415IGN#TRPBF - 24-Bit µPower Delta-Sigma ADC | ADI
The Analog Devices LTC2415IGN#TRPBF is a 24-bit differential input, no-latency delta-sigma analog-to-digital converter housed in a 16-pin SSOP (GN) package. It operates from a 2.7V to 5.5V supply, achieves 2 ppm INL and 0.23 ppm RMS noise, and uses an integrated oscillator that eliminates the need for an external crystal or clock source. Single-cycle settling makes it ideal for multiplexed applications, while a single external pin can configure the LTC2415 for >110 dB input differential mode rejection at 50 Hz / 60 Hz. What is a delta-sigma ADC? A delta-sigma (ΔΣ) converter is a type of analog-to-digital converter that oversamples an input signal at a much higher rate than its Nyquist bandwidth and uses noise shaping to push quantization noise outside the signal band, then low-pass filters and decimates the result. The technique delivers very high resolution (16 to 32 bits) and excellent linearity at low frequencies, at the cost of conversion speed. Within the converter taxonomy, delta-sigma sits between successive-approximation register (SAR) ADCs (faster, lower resolution) and integrating ADCs (highest noise rejection at DC). The LTC2415 belongs to the no-latency ΔΣ family — every conversion produces a valid output without the pipeline delay found in many multi-bit ΔΣ parts. Key features include differential input and differential reference, on-chip oscillator, a 2.7 V – 5.5 V single supply, 24-bit output with 2 ppm INL, 0.23 ppm RMS noise (≈6 µV RMS at 5 V reference), and micropower operation. The common-mode voltage of both the input and the reference can be set independently anywhere between GND and VCC, easing bridge-, thermocouple-, and weigh-scale-style front ends. The architecture is a fourth-order delta-sigma modulator followed by a digital decimation filter; this topology is what gives the LTC2415 its single-cycle settling behavior and its exceptional normal-mode rejection at mains frequencies. Pin-for-pin and electrically compatible with the LTC2415-1 variant, this part is also a fit in 4-wire RTD and load-cell systems where the differential reference directly cancels ratiometric errors. Typical applications include precision weigh scales, strain-gauge bridges, thermocouple signal chains, 6-digit digital voltmeters, and battery-powered instrumentation. The wide common-mode range allows the ADC to digitize small differential signals riding on rails up to the full supply. When designing with the LTC2415IGN#TRPBF, note that its effective input range is bounded by the reference voltage — using a 5 V reference yields ±5 V differential input capability, while a 100 mV reference reduces it to ±100 mV. Place the reference and input bypass capacitors close to the pins and keep the digital SCK, SDO, and CS traces away from analog inputs to preserve the 0.23 ppm RMS noise floor. This page synthesizes distributor pricing, verified drop-in alternatives, and practical design notes that go beyond what is reproduced in the manufacturer datasheet, giving engineers one place to evaluate sourcing, parametric fit, and PCB-level design choices for the LTC2415 family.
LTC2451ITS8#TRMPBF - 16-Bit ΔΣ ADC, I2C, TSOT-23-8 | ADI
The Analog Devices LTC2451ITS8#TRMPBF is an ultra-tiny, 16-bit, delta-sigma analog-to-digital converter in an 8-pin TSOT-23 (3 mm × 2 mm) package, operating from a single 2.7 V to 5.5 V supply. It accepts a single-ended analog input, communicates through a standard I2C interface, and integrates an internal oscillator that requires no external timing components. The converter provides 16-bit output codes with a maximum output data rate of approximately 60 conversions per second. A delta-sigma ADC (also written ΔΣ ADC, sigma-delta ADC, or oversampling noise-shaping converter) is a type of analog-to-digital converter that uses high oversampling followed by digital decimation and noise shaping to achieve very high effective resolution at low bandwidths. The architecture trades input bandwidth for noise-free resolution, making ΔΣ ADCs the dominant choice for precision DC and low-frequency measurement in instrumentation, sensors, and battery monitoring. Within the data-converter hierarchy, the LTC2451 belongs to the precision-ADC family, which sits between high-speed successive-approximation (SAR) ADCs (>1 MSPS) and high-resolution integrating ADCs (>20 bits). Key features of the LTC2451 include integrated I2C addressing, a low quiescent supply current, an automatic shutdown between conversions that minimizes average power, and excellent DC accuracy (no missing codes at 16 bits). The TSOT-23-8 footprint occupies only 3 mm × 2 mm of PCB area, making the device one of the smallest precision ADCs available and an excellent fit for space-constrained sensor-interface applications. The device communicates via I2C with factory-programmable slave addresses selected by the I2C device address part suffix, enabling multiple LTC2451 devices on a single bus. Common-mode input range includes ground, allowing true zero-volt measurement in single-supply systems. The internal oscillator and digital filter settle a single conversion in approximately 16.6 ms without external components. Typical applications include portable instrumentation, weigh scales, direct temperature measurement with bridge sensors, gas and flow metering, isolated sensor front ends, battery monitors, and any precision microcontroller-based system that requires compact, low-power ADC functionality with a digital I2C bus. When designing with the LTC2451, place the decoupling capacitor as close as possible to the VDD pin and keep analog and digital ground returns short and joined at a single point to preserve noise-free 16-bit performance. The I2C lines should be pulled up to VDD with 2.2 kΩ to 10 kΩ resistors depending on bus speed and capacitance. This page synthesizes distributor pricing, verified drop-in alternatives, parametric comparisons, and practical design guidance that goes beyond a single datasheet reading, intended for engineers validating the LTC2451ITS8#TRMPBF for new designs or maintenance of existing single-supply precision-ADC subsystems.
LTC2461CDD - 16-Bit I2C Delta-Sigma ADC | Analog Devices
The Analog Devices LTC2461CDD is an ultra-tiny, 16-bit delta-sigma analog-to-digital converter with an integrated 1.25V precision reference, packaged in a 12-pin DFN (3x3 mm) and accessed via an I2C-compatible serial interface. It operates from a single 2.7V to 5.5V supply, delivers single-ended 0V-to-1.25V input range measurements, and achieves 10 ppm/°C maximum reference temperature drift while consuming only a few hundred microamps during active conversion. The device is offered in the commercial 0°C to +70°C temperature grade, distinguished by the "C" suffix in the part number, and ships lead-free (PBF) compliant with RoHS. What is a delta-sigma ADC? A delta-sigma (ΔΣ) analog-to-digital converter oversamples an input signal at a rate much higher than Nyquist and uses noise-shaping digital filtering to push quantization noise out of the signal band, achieving high resolution (16 bits and beyond) at the cost of conversion speed. Delta-sigma ADCs sit in the broader category of analog-to-digital converters > data converters > signal chain ICs > semiconductors, and are the standard choice for low-frequency, high-precision measurements. Key features of the LTC2461 include an integrated 1.25V reference with 10 ppm/°C drift, 16-bit no-missing-codes performance, single-cycle conversion, automatic sleep between conversions to minimize quiescent current, and a simple I2C interface with pin-selectable addresses. The internal oscillator eliminates the need for an external clock, and the small DFN-12 (3x3 mm) footprint makes it ideal for space-constrained sensor modules and battery-powered instruments where PCB area is at a premium. Technically, the LTC2461 uses a proprietary multi-order delta-sigma modulator followed by a digital SINC1 filter, providing single-cycle settling at the output data rate. The internal reference is factory-trimmed and temperature-compensated, removing the need for an external precision reference. The I2C interface supports standard (100 kHz) and fast (400 kHz) modes and includes a chip-enable pin that allows up to two devices on the same bus, simplifying multi-channel sensor designs. Typical applications include portable instrumentation, weight scales and force sensors, temperature and pressure monitoring, industrial process control front-ends, and battery-powered sensor nodes. The ultra-low power and tiny footprint make it especially attractive for IoT edge devices and wearable health monitors where every square millimeter and microamp matters. When designing with the LTC2461, observe the I2C pull-up resistor sizing rules and decouple VDD with a 0.1 µF ceramic capacitor placed as close as possible to the VDD pin. The input signal should be kept within 0V to VREF (1.25V); for higher voltage inputs, an external resistive divider or buffer is required. Use the chip-enable pin to share the I2C bus with another LTC2461 or LTC2463 device for dual-channel systems. This page synthesizes distributor stock and pricing for the LTC2461CDD, drop-in alternative MPNs sharing the DFN-12 footprint, and practical design notes that supplement the manufacturer datasheet with selection guidance.
LTC2461IDD - 16-Bit I2C ADC, 12-DFN Package | Analog Devices
The Analog Devices LTC2461IDD is an ultra-tiny 16-bit delta-sigma analog-to-digital converter that combines a precision 1.25V integrated reference with an I2C serial interface in a 12-pin DFN (3 mm × 3 mm) package. It operates from a single 2.7 V to 5.5 V supply, accepts a single-ended 0 V to 1.25 V input, and delivers up to 16-bit resolution with no missing codes. The integrated reference exhibits 10 ppm/°C maximum drift and 0.1% initial precision, which lets the absolute displacement-error budget fit in 8-bit LSb at 25 °C. A delta-sigma ADC (also written delta-sigma or sigma-delta) is a type of oversampling converter that uses noise shaping to push quantization noise out of the baseband, enabling high effective resolution at low bandwidths without expensive laser-trimmed analog components. It belongs to the broader hierarchy of ADC (analog-to-digital converter) -> data converter -> mixed-signal IC -> semiconductor. The LTC2461's delta-sigma architecture paired with an integrated reference makes it well suited for compact, low-noise measurement front-ends where PCB real estate and BOM count are critical. Key features include 16-bit effective number of bits, 60 Hz output rate in 1x speed setting (up to 1.2 kHz in 2x), 1.25 V single-ended pseudo-differential input range, integrated 1.25 V reference with 2 ppm/°C typical drift, an I2C-compatible 2-wire serial interface with selectable addresses, internal oscillator, and automatic offset and full-scale calibration. The device continuously performs self-calibration, eliminating the need for external trimming while keeping total unadjusted error below a few LSb over temperature. The LTC2461IDD implements a proprietary charge-balancing modulator clocked by its own internal RC oscillator, so no external clock source is required. The output word rate is configurable via the I2C OBR (Output Rate) bit, and conversion results are available as standard 16-bit I2C read transactions. The 12-lead DFN package exposes the exposed pad for thermal and ground integrity. Typical uses include portable instrumentation, weigh scales, direct sensor digitisation for thermocouples and RTDs (with external front-end), battery-cell voltage monitoring in 3 V and 5 V systems, precision current sensing with a current-sense resistor, and consumer medical devices such as blood-pressure meters and glucose monitors. The integrated reference eliminates an extra IC in compact designs, and the I2C interface reduces microcontroller GPIO usage to two lines. When designing with the LTC2461IDD, place the 0.1 µF VDD bypass capacitor as close to the VDD pin as possible, and tie the GND exposed pad to a low-impedance ground pour to minimise digital return currents. For best noise performance, average multiple conversions in firmware and avoid switching the I2C SCL line near the ADC's acquisition window. This page combines distributor pricing, drop-in 12-DFN alternatives, comparison versus pinout-grade industry sources, and practical design notes not found in the manufacturer datasheet alone.
LTC2486IDE#TR - 16-Bit 4-Ch Delta-Sigma ADC w/ PGA | ADI
The Analog Devices (formerly Linear Technology) LTC2486IDE#TR is a 16-bit, 4-channel (2-channel differential) No Latency Delta-Sigma analog-to-digital converter with Easy Drive technology, integrated PGA, and I2C/SPI-compatible serial interface, housed in a 14-pin DFN (4x3 mm) package. The patented sampling scheme eliminates dynamic input current errors through automatic cancellation of differential input current, allowing large external source impedances and rail-to-rail input signals to be digitized directly. An ADC (analog-to-digital converter) is a data acquisition integrated circuit that converts continuous analog voltage signals into discrete digital codes for processing by microcontrollers, FPGAs, or DSPs. Delta-Sigma (ΔΣ) ADCs use oversampling and noise-shaping to achieve high resolution at the cost of conversion speed. Within the broader hierarchy, the LTC2486 sits as: ADC -> data converter -> data acquisition IC -> signal chain IC -> semiconductor. The "No Latency" feature guarantees that the first conversion after a new channel selection is valid, simplifying multiplexed measurements versus conventional delta-sigma ADCs that require settling cycles. Key features include 16-bit resolution with no missing codes, an integrated programmable gain amplifier, wide common-mode input range (0V to VCC) independent of the reference voltage, simultaneous 50Hz/60Hz rejection, and an external differential reference input. Easy Drive technology permits rail-to-rail inputs with source impedances up to several kilohms, eliminating the need for on-chip input buffers and their charge-kickback errors. The internal architecture combines a third-order delta-sigma modulator, a sinc4 digital filter, and an on-chip oscillator. The integrated PGA (gain 1 to 256) lets low-level sensor signals (such as thermocouples or strain gauges) be amplified before conversion. The serial interface (SPI) supports daisy-chain connection of multiple LTC2486 devices on a single bus. Reference voltage can be differential and ratiometric to the analog supply. Typical applications include direct thermocouple digitization with cold-junction compensation, bridge pressure transducers, weight scales, industrial temperature measurement, gas sensors, and battery cell monitoring. The wide common-mode range makes it ideal for any single-ended or differential sensor with ground-referenced signals. In multi-channel data-acquisition boards the LTC2486's per-channel valid-first-conversion behavior simplifies firmware because the controller does not have to discard dummy conversions after switching MUX channels. A key design consideration is choosing the reference voltage: lower reference (e.g., 100mV to 1V) combined with PGA gain maximizes dynamic range for low-level signals, while a higher reference (up to VCC) maximizes absolute accuracy. The DFN-14 package requires careful PCB layout with a low-impedance ground pour under the exposed pad (pin 14) for thermal dissipation and noise immunity. This page synthesizes distributor pricing, drop-in pin-compatible alternatives, and practical design notes not found in the manufacturer datasheet alone, helping engineers select, source, and implement the LTC2486IDE#TR with confidence.
LTC2493IDE - 24-Bit 4-Ch Delta-Sigma ADC with Easy Drive | ADI
The Analog Devices LTC2493IDE is a 24-bit, 4-channel (2-channel differential) No Latency Delta-Sigma analog-to-digital converter with patented Easy Drive technology and a 2-wire I2C interface, housed in a 14-pin DFN (4x3 mm) package. The ADC integrates an on-chip temperature sensor delivering 1/30th °C resolution and 2 °C absolute accuracy, and accepts any common-mode input from 0 V to VCC independent of the reference voltage, simplifying bridge and thermocouple front ends. A delta-sigma (ΔΣ) ADC is a type of oversampling converter that uses noise-shaping and digital filtering to achieve very high resolution at low sample rates. It belongs to the broader hierarchy of analog-to-digital converters → data converters → mixed-signal ICs → semiconductors, and is widely used in precision measurement where DC accuracy and noise rejection matter more than raw speed. The Easy Drive input current cancellation scheme of the LTC2493 eliminates dynamic input current errors that plague conventional delta-sigma ADCs, removing the need for on-chip input buffers and their associated offset/settling trade-offs. Key features include 24-bit no-latency operation, automatic offset and full-scale calibration every conversion cycle independent of input channel, 2-wire I2C interface, integrated temperature sensor, and an external fO clock pin that allows the user to override the internal conversion clock to change output rate and digital filter notch placement. The device operates from a single 2.7 V to 5.5 V supply with low supply current suited to battery-powered instrumentation. The architecture combines a multi-order delta-sigma modulator with a SINC4 digital filter, achieving excellent 50 Hz/60 Hz power-line rejection at default output rates and the ability to reject 50 Hz/60 Hz interference at custom rates by driving fO. The first conversion after a channel change is valid to full specification. Typical applications include precision weigh scales, strain-gauge bridges, thermocouple temperature measurement, industrial process control, and battery-powered portable instrumentation. The wide common-mode range and Easy Drive inputs make the LTC2493IDE particularly attractive for direct connection to resistive sensors and low-voltage bridges. Design consideration: drive the LTC2493IDE with a low-thermal-reference such as the LTC6655, and route the analog ground as a separate pour. Use a 0.1 µF ceramic bypass capacitor within a few millimeters of the supply pin to preserve noise performance. This page synthesizes distributor pricing, pin-compatible drop-in alternatives, and practical design notes that are not found in the manufacturer datasheet alone.
LTC2662HUH-12#PBF - 5Ch 12-bit Current-Source DAC | Analog Devices
The Analog Devices LTC2662HUH-12#PBF is a 5-channel, 12-bit current-source digital-to-analog converter (DAC) that delivers five high-compliance current source outputs with a guaranteed 1 V dropout at 200 mA, housed in a 32-pin QFN (5x5 mm) package. Each output draws its current from a dedicated positive supply pin that accepts 2.85 V to 33 V, supporting load voltages up to 32 V and full-scale outputs up to 300 mA with eight per-channel programmable current ranges. Multiple channels can be paralleled for combined outputs up to 1.5 A, and internal 12 ohm switches allow any output pin to connect to an optional negative V- supply and sink up to 80 mA. A current-source DAC (also called a current-output DAC or IDAC) is a digital-to-analog converter whose output stage delivers a programmable current rather than a voltage. In the signal-chain taxonomy it sits below general-purpose DACs and above simple current mirrors: IDAC -> DAC -> data converter -> signal chain IC -> semiconductor. This category is the preferred building block when the load itself has a well-defined compliance voltage and the application requires precise, fast, and noise-immune current programming, such as LED biasing, laser diode drivers, and programmable current sources in test instruments. The LTC2662 integrates a precision reference, per-channel range registers, and a high-compliance output stage on a single die. The device operates over the -40 C to +125 C automotive/industrial temperature range and includes a serial peripheral interface (SPI) for digital configuration. The wide 32 V compliance and 200 mA continuous per-channel capability eliminate the need for external op-amp current boosters in many applications, while the parallelable architecture scales to multi-amp systems. The QFN-32 (5x5) package exposes a thermal pad that must be soldered to a ground copper pour for rated thermal performance. Typical applications include laser diode drive, LED biasing and dimming, programmable current sources, solenoid/actuator drive, and process-control instrumentation where bipolar or unipolar high-compliance currents are required. The 32 V compliance directly supports 28 V nominal industrial buses, while the 80 mA sink capability handles thermistor or Peltier biasing. When designing with this DAC, treat each output as an independent current source with its own V+ pin; use Kelvin-sense layout when load currents exceed 100 mA. Decouple every V+ pin with a 1 uF ceramic plus 10 uF bulk capacitor, and parallel outputs by tying OUT_x pins together before the load to achieve higher currents with matched range settings. This page synthesizes distributor pricing, same-brand and cross-brand drop-in alternatives in the QFN-32 footprint, and practical design notes not consolidated in the Analog Devices datasheet.
LTC2662HUH-16#PBF - 16-Bit 5-Ch 300mA Current-Source DAC | ADI
The Analog Devices LTC2662HUH-16#PBF is a 16-bit, five-channel current-source digital-to-analog converter (DAC) housed in a 32-pin QFN (5x5 mm) package, providing five high-compliance current source outputs with a guaranteed 1 V dropout at 200 mA and load voltage support up to 32 V. The LTC2662 family delivers 5 independently programmable channels of monotonic 16-bit (or 12-bit) current-output DAC with SoftSpan architecture that allows output ranges from 3 mA to 300 mA full-scale, all sharing the same 32-QFN footprint. What is a current-source DAC? A current-output digital-to-analog converter converts a digital code into a precise analog current, rather than voltage. Within the data-converter hierarchy, the LTC2662 belongs to the DAC family, more specifically current-steering or current-source DACs, which are widely used to drive laser diodes, precision actuators, programmable current bias, and process-control loops. Compared with voltage-output DACs, current-output parts eliminate output buffers and headroom-loss, allowing the load to sit at a high compliance voltage while the DAC itself drops just 1 V. Key features of the LTC2662HUH-16#PBF include guaranteed 1 V dropout at 200 mA per channel, 32 V load compliance, per-channel SoftSpan programmable full-scale current from 3 mA to 300 mA, a wide supply range (AVDD up to 5.5 V, load rail up to 32 V), and a flexible serial SPI-compatible interface with per-channel readback. The device uses a precision internal reference and offers daisy-chain capability for multi-device synchronization. The architecture is built around five matched current cells steered by a 16-bit segmented architecture. The internal reference and precision thin-film resistors deliver INL of approximately 1 LSB and DNL of ±0.5 LSB on the -16 grade. The wide compliance window (1 V to 32 V headroom over the load) lets the LTC2322662 directly drive H-bridges, optocouplers, and laser diodes without external driver stages. Typical applications include laser-diode driver bias for telecom and instrumentation, programmable current sources for industrial process control, optical attenuators, precision actuator drive in medical and test equipment, and 4 mA to 20 mA / 0 mA to 20 mA loop-driving when combined with an external boost stage. The 32-QFN footprint fits dense PCB designs and keeps channel-to-channel thermal coupling manageable. Design tip: decouple the AVDD pin with a 10 uF + 100 nF pair placed within 5 mm of the IC, and reserve a small copper island under the exposed pad to draw heat out of the package when more than two channels are operated near 200 mA. Ensure the load path returns to the LTC2662's GND to avoid ground-loop errors in the high-compliance current output. This page synthesizes DigiKey/Mouser distributor pricing, drop-in same-package variants, and application-specific design notes not available in the manufacturer datasheet alone.
MAX1002CAX+ - 60Msps Dual 6-Bit ADC, Low-Power | Maxim Integrated
The Maxim Integrated MAX1002CAX+ is a low-power, 60Msps, dual-channel, 6-bit analog-to-digital converter (ADC) housed in a 36-pin SSOP package. It combines high-speed, low-power operation with a user-selectable input range, an internal reference, and an internal clock oscillator. The dual, parallel ADCs are designed to convert in-phase (I) and quadrature (Q) analog signals into two 6-bit offset-binary-coded digital outputs at sampling rates up to 60Msps. An analog-to-digital converter (ADC) is a semiconductor component that transforms a continuous analog input signal into a discrete digital code. Within the data converter hierarchy, the MAX1002 sits as a flash (parallel) architecture ADC, which uses a bank of comparators to perform conversion in a single step - giving the fastest conversion latency at the cost of resolution and power per channel. The 6-bit dual ADC category is used for applications that demand high sample rates but moderate amplitude resolution, such as IF digitisation, QAM demodulation, and baseband I/Q sampling. Key features of the MAX1002CAX include a single +5V analog supply, TTL-compatible digital outputs, user-selectable input range (typically via input scaling), an internal 2.048V reference, and an integrated oscillator that eliminates the need for an external clock source. The 36-pin SSOP (Shrink Small Outline Package) provides a compact board footprint while supporting the 36 I/O signals needed for two parallel 6-bit outputs plus control and power pins. Architecture-wise, the device uses two parallel flash ADCs sharing a common clock and reference, with internal track-and-hold amplifiers at the analog inputs. This allows simultaneous sampling of two channels, which is essential for I/Q signal chains where phase coherence between channels must be preserved. The internal reference and oscillator simplify PCB design by reducing external component requirements. Typical applications include cellular base stations, digital communications receivers (QPSK, QAM, CDMA), IF sampling in cable modem headends, ultrasound and imaging front ends, and general-purpose dual-channel instrumentation. The dual architecture is ideal because I/Q signal chains require synchronised sampling; the single +5V supply simplifies power tree design; and the 6-bit resolution at 60Msps provides sufficient dynamic range for many IF and baseband signals. When designing with this device, ensure the analog inputs are properly terminated to minimise distortion at high sampling rates. Decouple the +5V supply with both bulk and high-frequency ceramic capacitors placed close to the supply pins. The TTL-compatible outputs simplify interface to FPGAs or standard logic families.