10AS032H2F35E1HG vs 10AS032H2F34E2LG Comparación
Comparación detallada lado a lado de 10AS032H2F35E1HG por Intel y 10AS032H2F34E2LG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AS032H2F35E1HG | 10AS032H2F34E2LG |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.293,00 | $1.380,00 |
| Device Family | Arria 10 SX SoC FPGA | — |
| Product Type | System-on-Chip (SoC) FPGA | — |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Logic Elements | 320,000 | 320,000 |
| User I/Os | 384 | — |
| Maximum Transceiver Data Rate | 1.5 GHz [DATA_NEEDED: actual Gbps line rate per protocol] | — |
| Encapsulado | 1152-ball FCBGA (35 x 35 mm) | 1152-ball FC-FBGA (F34), 35 x 35 mm |
| Operating Temperature Grade | Industrial (E1) | — |
| Tipo de montaje | Surface Mount (Flip-Chip BGA) | Surface Mount (BGA) |
| Process Node | 20 nm [DATA_NEEDED: exact process geometry per Intel datasheet] | 20 nm |
| Configuration | Serial (E1 suffix) | SoC FPGA (HPS + FPGA fabric) |
| Tensión de alimentación | [DATA_NEEDED: core/aux/HPS voltage rails per datasheet] | — |
| Estado RoHS | Compliant [DATA_NEEDED: per specific PCN or compliance certificate] | Compliant |
| Nivel MSL | [DATA_NEEDED: MSL rating from JEDEC J-STD-020] | — |
| Hard Processor System | HPS with Cortex-A9 dual core, L1/L2 cache, peripherals | — |
| Family | — | Arria 10 SX |
| Device Tier | — | 10AS032 (mid-density) |
| Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Operating Frequency | — | 1.5 GHz |
| Speed Grade | — | 2 |
| Temperature Grade | — | E2 (commercial/extended) |
| On-chip Memory (M20K blocks) | — | Approx. 21 Mb [DATA_NEEDED: exact Mb from datasheet] |
| DSP Blocks | — | Variable-precision, IEEE 754 single-precision FP support |
| Transceivers | — | Up to 14.1 Gbps [DATA_NEEDED: exact count for F34 package] |
| Memory Controller Hard IP | — | DDR4, DDR3, QDRII+, RLDRAM3 |
| Form of Terminal | — | Ball (BGA) |
| Terminal Pitch | — | 1 mm |