10AS032H2F35I2LG vs 10AS032H2F35E1HG Comparación
Comparación detallada lado a lado de 10AS032H2F35I2LG por Altera y 10AS032H2F35E1HG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AS032H2F35I2LG | 10AS032H2F35E1HG |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.295,00 | $1.293,00 |
| Family | Arria 10 SX | — |
| Device Variant | 10AS032 (320K Logic Elements) | — |
| Architecture | SoC FPGA (FPGA + Hard Processor System) | — |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| Logic Elements | 320 K | 320,000 |
| Maximum Logic Performance | 1.5 GHz | — |
| Encapsulado | 1152-FBGA, FC (Flip-Chip), 35x35 mm (F35) | 1152-ball FCBGA (35 x 35 mm) |
| Tipo de montaje | Surface Mount | Surface Mount (Flip-Chip BGA) |
| Operating Temperature Grade | Industrial (I2 suffix) | Industrial (E1) |
| Estado RoHS | Compliant | Compliant [DATA_NEEDED: per specific PCN or compliance certificate] |
| Lead Free | Yes | — |
| Nivel MSL | [DATA_NEEDED: MSL Level] | [DATA_NEEDED: MSL rating from JEDEC J-STD-020] |
| Number of Terminals | 1152 (Ball) | — |
| Terminal Form | Ball | — |
| Package Code | BGA (FCBGA) | — |
| Process Technology | [DATA_NEEDED: Process Node] | — |
| Device Family | — | Arria 10 SX SoC FPGA |
| Product Type | — | System-on-Chip (SoC) FPGA |
| User I/Os | — | 384 |
| Maximum Transceiver Data Rate | — | 1.5 GHz [DATA_NEEDED: actual Gbps line rate per protocol] |
| Process Node | — | 20 nm [DATA_NEEDED: exact process geometry per Intel datasheet] |
| Configuration | — | Serial (E1 suffix) |
| Tensión de alimentación | — | [DATA_NEEDED: core/aux/HPS voltage rails per datasheet] |
| Hard Processor System | — | HPS with Cortex-A9 dual core, L1/L2 cache, peripherals |