10AS048H2F34E1HG vs 10AS048H2F34E2LG Comparación
Comparación detallada lado a lado de 10AS048H2F34E1HG por Altera y 10AS048H2F34E2LG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
10AS048H2F34E2LG - Arria 10 SX 480K SoC FPGA, Dual A9, 1152-FBGA | Intel
10AS048H2F34E2LG ✓ ActivoComparación de especificaciones
| Parámetro | 10AS048H2F34E1HG | 10AS048H2F34E2LG |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $3.650,00 | $2.280,00 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX |
| Logic Elements | 480K | 480000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | 1.5 GHz | 1.5 GHz |
| Encapsulado | 1152-ball FCBGA (F34), 35x35 mm | 1152-ball FC-FBGA (F34), 35 x 35 mm |
| Speed Grade | H2 | — |
| Transceivers | Multi-gigabit (14.1 Gbps-capable, family-level) | [DATA_NEEDED: number / data rate] |
| DSP Blocks | Variable-precision DSP (family-level) | [DATA_NEEDED: variable-precision DSP block count] |
| On-chip Memory | M20K blocks plus MLAB (family-level) | — |
| Memory Interface | DDR3/DDR4 hard memory controllers (family-level) | — |
| PCIe Hard IP | Gen2/Gen3 capable (family-level) | — |
| Temperatura de funcionamiento | Extended (per OPN E1 suffix, family-level) | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (flip-chip BGA) |
| Estado RoHS | Compliant (per distributor listing) | Compliant |
| Configuration Device | Supported (family-level, external or internal) | — |
| Process Technology | — | 20 nm |
| Core Voltage | — | 0.9 V |
| Operating Temperature Grade | — | Industrial / Medical (per OPN code H2) |
| Logic Family | — | Arria 10 SoC FPGA |
| Adaptive Logic Modules | — | [DATA_NEEDED: ALM count] |
| Embedded Memory (M20K) | — | [DATA_NEEDED: Mbits] |
| User I/O Banks | — | [DATA_NEEDED: bank count and total user I/O] |
| Nivel MSL | — | 3 (per FBGA package) |