10AS057H2F34I2SG vs 10AS057H3F34I2LG Comparación
Comparación detallada lado a lado de 10AS057H2F34I2SG por Intel y 10AS057H3F34I2LG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
10AS057H3F34I2LG - Arria 10 SX SoC FPGA, 570K LE, Dual ARM Cortex-A9 | Intel
10AS057H3F34I2LG ✓ ActivoComparación de especificaciones
| Parámetro | 10AS057H2F34I2SG | 10AS057H3F34I2LG |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7.100,00 | $2.950,00 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX SoC FPGA |
| Logic Elements | 570000 | 570 K |
| Process Technology | 20 nm | — |
| Core Voltage | 0.9 V | — |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum User I/O | 492 | — |
| Encapsulado | 1152-ball FCBGA (F34) | 1152-ball FCBGA (F34, 35x35 mm) |
| Package Dimensions | 35 x 35 mm | — |
| Tipo de montaje | Surface Mount (Flip-Chip BGA) | Surface Mount |
| Operating Temperature Grade | Industrial (-40C to +100C) | — |
| Speed Grade | -2 (mid-range) | I2 (mid-speed, industrial) |
| Transceiver Data Rate | Up to 1.5 Gbps (effective) | — |
| Configuration | JTAG, AS, FPP | — |
| Estado RoHS | Compliant | Compliant |
| Part Number Decoder - I2 | Industrial temperature grade | — |
| Part Number Decoder - SG | Lead-free, RoHS compliant, Pb-free F34 package | — |
| HPS Maximum Core Frequency | — | 1.5 GHz |
| Process Node | — | 20 nm |
| Operating Temperature (Industrial) | — | -40 C to +100 C (junction) |
| User I/O | — | 492 (per Heisener listing) |
| Transceivers | — | Up to 16.7 Gbps (per Arria 10 family) |
| Hard Memory Controllers | — | DDR3/DDR4 with ECC |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |
| Supply Voltage (Core) | — | [DATA_NEEDED: core VCC] |