10AS057K1F35E1HG vs 10AS048K1F35E1HG Comparación
Comparación detallada lado a lado de 10AS057K1F35E1HG por Intel y 10AS048K1F35E1HG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AS057K1F35E1HG | 10AS048K1F35E1HG |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.280,00 | $3.850,00 |
| Family | Arria 10 SX SoC FPGA | — |
| Device Variant | 10AS057 | — |
| Logic Elements | 570,000 | 480,000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Processor Frequency | 1.5 GHz | — |
| Encapsulado | 1152-ball FC-BGA (35x35 mm) | 1152-ball FC-BGA (flip-chip), 35x35 mm |
| Speed Grade | -1 (F35) | — |
| Temperature Grade | Extended (E) | — |
| Embedded Memory | [DATA_NEEDED: embedded memory in Mbits] | — |
| Transceivers | Up to 24 channels | Multi-gigabit serial transceivers, up to 17.4 Gbps (family) |
| Maximum Transceiver Data Rate | 17.4 Gbps | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | Variable-precision DSP blocks (per family) |
| Memory Interfaces | DDR4 / DDR3 with hard controllers | DDR4, DDR3, LPDDR3, QDR IV (hard controllers) |
| HPS Peripherals | USB 2.0, Gigabit Ethernet, UART, SPI, I2C, SD/eMMC | Gigabit Ethernet, USB 2.0 OTG, SD/SDIO/MMC, SPI, I2C, UART, CAN |
| Process Node | 20 nm | — |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Estado RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Product Series | — | Arria 10 SX SoC FPGA |
| HPS Clock Speed | — | Up to 1.5 GHz |
| Process Technology | — | 20 nm |
| Temperatura de funcionamiento | — | Industrial / commercial per part number suffix |
| On-chip RAM | — | M20K memory blocks + MLAB (per family) |
| Hard IP Blocks | — | PCIe Gen3 (hard), 10/40 GbE MAC, DDR controllers, partial reconfiguration |
| Configuration | — | FPGA fabric + HPS independent configuration, supports AS/PS/JTAG |
| REACH Status | — | [DATA_NEEDED: REACH compliance] |
| Design Software | — | Intel Quartus Prime (legacy: Altera Quartus II) |