10AS057K3F35E2SG vs 10AS057K2F35E2LG Comparación
Comparación detallada lado a lado de 10AS057K3F35E2SG por Intel y 10AS057K2F35E2LG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AS057K3F35E2SG | 10AS057K2F35E2LG |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $3.740,00 | $3.450,00 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX SoC FPGA |
| Logic Elements | 570,000 | 570,000 |
| Process Technology | 20 nm | — |
| Hard Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Core Voltage | 0.9 V | — |
| Encapsulado | 1152-pin FC-FBGA (35x35 mm) | 1152-ball FCBGA, 35 mm x 35 mm, 1.0 mm pitch |
| Tipo de montaje | Surface Mount (BGA) | — |
| Temperatura de funcionamiento | 0 C to +85 C (industrial) | -40C to +100C (extended-industrial screening) |
| Lead-Free / RoHS | Yes / Compliant | — |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Core Speed | up to 1.5 GHz | — |
| Configuration Memory | [DATA_NEEDED: bit-width / type] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: 18x19 multiplier count] |
| Embedded Memory | [DATA_NEEDED: M20K block count / total] | — |
| Transceivers | [DATA_NEEDED: transceiver count / rate] | Up to 24 channels, up to 17.4 Gbps |
| User I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Process Node | — | TSMC 20 nm |
| HPS Cores | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Max Frequency | — | 1.5 GHz |
| Embedded Memory (M20K) | — | [DATA_NEEDED: M20K block count and total bits] |
| PCIe Hard IP | — | Gen3 x4 (rootport/endpoint) |
| User I/Os | — | 396 |
| Speed Grade | — | E2 (commercial/extended) |
| Configuration | — | SRAM-based, partial reconfiguration, SEU mitigation, ECC |
| Memory Interfaces | — | DDR3/DDR4 with hard PHY (HPS + FPGA) |
| Estado RoHS | — | Compliant |
| Lead-Free | — | Yes |