10AX115N4F45E3LG vs 10AX115N4F40I3SG Comparación
Comparación detallada lado a lado de 10AX115N4F45E3LG por Intel y 10AX115N4F40I3SG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AX115N4F45E3LG | 10AX115N4F40I3SG |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7.100,00 | $3.500,00 |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements (LE) | 1,150,000 | 1,150,000 |
| Adaptive Logic Modules (ALM) | 427,200 | [DATA_NEEDED: ALM count] |
| Embedded Memory | 68,857,856 bits (8,532 Kbits per M20K block) | — |
| DSP Blocks | 3,376 (variable-precision, 18x19 multipliers) | [DATA_NEEDED: DSP block count] |
| Maximum User I/O Pins | 768 | — |
| Transceivers | Up to 96 channels at up to 17.4 Gbps | — |
| Hard Processor System | Dual ARM Cortex-A9 MPCore | — |
| Memory Interfaces | DDR4, DDR3, QDR-IV, RLDRAM III (hard controller) | — |
| PCIe Hard IP | PCIe Gen3 x8 (hard IP block) | — |
| PLLs | 24 | — |
| Process Technology | TSMC 20nm | — |
| Encapsulado | 1932-ball FCBGA (F45, 45x45 mm) | 1517-BBGA, FCBGA (F40), 40 x 40 mm, 1.00 mm pitch |
| Temperatura de funcionamiento | Extended (E) industrial grade per ordering code | -40C to +100C (Industrial) |
| Estado RoHS | Compliant | Compliant |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Nivel MSL | [DATA_NEEDED: MSL rating] | 3 (per JEDEC J-STD-020) |
| Voltage Rails | Core 0.9 V, transceiver 1.0/1.1 V, I/O bank-dependent | — |
| Embedded Memory Bits | — | 68,857,856 |
| Maximum User I/O | — | 600 |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |
| Maximum Transceiver Data Rate | — | 17.4 Gbps |
| Process Node | — | 20 nm |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCC core voltage] |
| Configuration | — | Serial, Parallel, and Avalon-ST supported |
| Hardened IP | — | PCIe Gen3, 100G Ethernet MAC (per Quartus IP library) |
| Device Family Position | — | Mid-range 20 nm transceiver FPGA |